/*****************************************************************************/
/* HPI6205 specific error codes */
-#define HPI6205_ERROR_BASE 1000 /* not actually used anywhere */
+#define HPI6205_ERROR_BASE 1000 /* not actually used anywhere */
/* operational/messaging errors */
#define HPI6205_ERROR_MSG_RESP_IDLE_TIMEOUT 1015
u32 outstream_host_buffer_size[HPI_MAX_STREAMS];
struct consistent_dma_area h_control_cache;
- struct consistent_dma_area h_async_event_buffer;
-/* struct hpi_control_cache_single *pControlCache; */
- struct hpi_async_event *p_async_event_buffer;
struct hpi_control_cache *p_cache;
};
{
if (phm->obj_index >= HPI_MAX_STREAMS) {
- phr->error = HPI_ERROR_INVALID_STREAM;
+ phr->error = HPI_ERROR_INVALID_OBJ_INDEX;
HPI_DEBUG_LOG(WARNING,
"Message referencing invalid stream %d "
"on adapter index %d\n", phm->obj_index,
{
if (phm->obj_index >= HPI_MAX_STREAMS) {
- phr->error = HPI_ERROR_INVALID_STREAM;
+ phr->error = HPI_ERROR_INVALID_OBJ_INDEX;
HPI_DEBUG_LOG(WARNING,
"Message referencing invalid stream %d "
"on adapter index %d\n", phm->obj_index,
ao.priv = kzalloc(sizeof(struct hpi_hw_obj), GFP_KERNEL);
if (!ao.priv) {
- HPI_DEBUG_LOG(ERROR, "cant get mem for adapter object\n");
+ HPI_DEBUG_LOG(ERROR, "can't get mem for adapter object\n");
phr->error = HPI_ERROR_MEMORY_ALLOC;
return;
}
err = create_adapter_obj(&ao, &os_error_code);
if (err) {
delete_adapter_obj(&ao);
- phr->error = err;
+ if (err >= HPI_ERROR_BACKEND_BASE) {
+ phr->error = HPI_ERROR_DSP_BOOTLOAD;
+ phr->specific_error = err;
+ } else {
+ phr->error = err;
+ }
phr->u.s.data = os_error_code;
return;
}
- phr->u.s.aw_adapter_list[ao.index] = ao.adapter_type;
+ phr->u.s.adapter_type = ao.adapter_type;
phr->u.s.adapter_index = ao.index;
- phr->u.s.num_adapters++;
phr->error = 0;
}
struct hpi_hw_obj *phw = pao->priv;
struct bus_master_interface *interface;
u32 phys_addr;
-#ifndef HPI6205_NO_HSR_POLL
- u32 time_out = HPI6205_TIMEOUT;
- u32 temp1;
-#endif
int i;
u16 err;
interface = phw->p_interface_buffer;
-#ifndef HPI6205_NO_HSR_POLL
- /* wait for first interrupt indicating the DSP init is done */
- time_out = HPI6205_TIMEOUT * 10;
- temp1 = 0;
- while (((temp1 & C6205_HSR_INTSRC) == 0) && --time_out)
- temp1 = ioread32(phw->prHSR);
-
- if (temp1 & C6205_HSR_INTSRC)
- HPI_DEBUG_LOG(INFO,
- "Interrupt confirming DSP code running OK\n");
- else {
- HPI_DEBUG_LOG(ERROR,
- "Timed out waiting for interrupt "
- "confirming DSP code running\n");
- return HPI6205_ERROR_6205_NO_IRQ;
- }
-
- /* reset the interrupt */
- iowrite32(C6205_HSR_INTSRC, phw->prHSR);
-#endif
-
/* make sure the DSP has started ok */
if (!wait_dsp_ack(phw, H620_HIF_RESET, HPI6205_TIMEOUT * 10)) {
HPI_DEBUG_LOG(ERROR, "timed out waiting reset state \n");
pao->has_control_cache = 0;
}
}
- /* allocate bus mastering async buffer and tell the DSP about it */
- if (interface->async_buffer.b.size) {
- err = hpios_locked_mem_alloc(&phw->h_async_event_buffer,
- interface->async_buffer.b.size *
- sizeof(struct hpi_async_event), pao->pci.pci_dev);
- if (!err)
- err = hpios_locked_mem_get_virt_addr
- (&phw->h_async_event_buffer, (void *)
- &phw->p_async_event_buffer);
- if (!err)
- memset((void *)phw->p_async_event_buffer, 0,
- interface->async_buffer.b.size *
- sizeof(struct hpi_async_event));
- if (!err) {
- err = hpios_locked_mem_get_phys_addr
- (&phw->h_async_event_buffer, &phys_addr);
- interface->async_buffer.physical_address32 =
- phys_addr;
- }
- if (err) {
- if (hpios_locked_mem_valid(&phw->
- h_async_event_buffer)) {
- hpios_locked_mem_free
- (&phw->h_async_event_buffer);
- phw->p_async_event_buffer = NULL;
- }
- }
- }
send_dsp_command(phw, H620_HIF_IDLE);
{
pao->open = 0; /* upon creation the adapter is closed */
+ if (phw->p_cache)
+ phw->p_cache->adap_idx = pao->index;
+
HPI_DEBUG_LOG(INFO, "bootload DSP OK\n");
return hpi_add_adapter(pao);
phw = pao->priv;
- if (hpios_locked_mem_valid(&phw->h_async_event_buffer)) {
- hpios_locked_mem_free(&phw->h_async_event_buffer);
- phw->p_async_event_buffer = NULL;
- }
-
if (hpios_locked_mem_valid(&phw->h_control_cache)) {
hpios_locked_mem_free(&phw->h_control_cache);
hpi_free_control_cache(phw->p_cache);
kfree(phw);
}
+/*****************************************************************************/
+/* Adapter functions */
+
/*****************************************************************************/
/* OutStream Host buffer functions */
status->dSP_index = 0;
status->host_index = status->dSP_index;
status->size_in_bytes = phm->u.d.u.buffer.buffer_size;
+ status->auxiliary_data_available = 0;
hw_message(pao, phm, phr);
/*
* This version relies on the DSP code triggering an OStream buffer
* update immediately following a SET_FORMAT call. The host has
- * already written data into the BBM buffer, but the DSP won't know about
- * it until dwHostIndex is adjusted.
+ * already written data into the BBM buffer, but the DSP won't know
+ * about it until dwHostIndex is adjusted.
*/
if (phw->flag_outstream_just_reset[phm->obj_index]) {
/* Format can only change after reset. Must tell DSP. */
status->dSP_index = 0;
status->host_index = status->dSP_index;
status->size_in_bytes = phm->u.d.u.buffer.buffer_size;
+ status->auxiliary_data_available = 0;
hw_message(pao, phm, phr);
+
if (phr->error
&& hpios_locked_mem_valid(&phw->
instream_host_buffers[phm->obj_index])) {
struct hpi_hw_obj *phw = pao->priv;
struct dsp_code dsp_code;
u16 boot_code_id[HPI6205_MAX_FILES_TO_LOAD];
- u16 firmware_id = pao->pci.pci_dev->subsystem_device;
u32 temp;
int dsp = 0, i = 0;
u16 err = 0;
boot_code_id[0] = HPI_ADAPTER_ASI(0x6205);
- /* special cases where firmware_id != subsys ID */
- switch (firmware_id) {
+ boot_code_id[1] = pao->pci.pci_dev->subsystem_device;
+ boot_code_id[1] = HPI_ADAPTER_FAMILY_ASI(boot_code_id[1]);
+
+ /* fix up cases where bootcode id[1] != subsys id */
+ switch (boot_code_id[1]) {
case HPI_ADAPTER_FAMILY_ASI(0x5000):
- boot_code_id[0] = firmware_id;
- firmware_id = 0;
+ boot_code_id[0] = boot_code_id[1];
+ boot_code_id[1] = 0;
break;
case HPI_ADAPTER_FAMILY_ASI(0x5300):
case HPI_ADAPTER_FAMILY_ASI(0x5400):
case HPI_ADAPTER_FAMILY_ASI(0x6300):
- firmware_id = HPI_ADAPTER_FAMILY_ASI(0x6400);
+ boot_code_id[1] = HPI_ADAPTER_FAMILY_ASI(0x6400);
break;
case HPI_ADAPTER_FAMILY_ASI(0x5600):
case HPI_ADAPTER_FAMILY_ASI(0x6500):
- firmware_id = HPI_ADAPTER_FAMILY_ASI(0x6600);
+ boot_code_id[1] = HPI_ADAPTER_FAMILY_ASI(0x6600);
break;
case HPI_ADAPTER_FAMILY_ASI(0x8800):
- firmware_id = HPI_ADAPTER_FAMILY_ASI(0x8900);
+ boot_code_id[1] = HPI_ADAPTER_FAMILY_ASI(0x8900);
+ break;
+ default:
break;
}
- boot_code_id[1] = firmware_id;
/* reset DSP by writing a 1 to the WARMRESET bit */
temp = C6205_HDCR_WARMRESET;
BAR1 via BootLoader_WriteMem32) */
boot_loader_write_mem32(pao, dsp_index, C6713_EMIF_GCTL,
0x000034A8);
+
+ /* EMIF CE0 setup - 2Mx32 Sync DRAM
+ 31..28 Wr setup
+ 27..22 Wr strobe
+ 21..20 Wr hold
+ 19..16 Rd setup
+ 15..14 -
+ 13..8 Rd strobe
+ 7..4 MTYPE 0011 Sync DRAM 32bits
+ 3 Wr hold MSB
+ 2..0 Rd hold
+ */
boot_loader_write_mem32(pao, dsp_index, C6713_EMIF_CE0,
0x00000030);
+
+ /* EMIF SDRAM Extension
+ 0x00
+ 31-21 0000b 0000b 000b
+ 20 WR2RD = 2cycles-1 = 1b
+
+ 19-18 WR2DEAC = 3cycle-1 = 10b
+ 17 WR2WR = 2cycle-1 = 1b
+ 16-15 R2WDQM = 4cycle-1 = 11b
+ 14-12 RD2WR = 6cycles-1 = 101b
+
+ 11-10 RD2DEAC = 4cycle-1 = 11b
+ 9 RD2RD = 2cycle-1 = 1b
+ 8-7 THZP = 3cycle-1 = 10b
+ 6-5 TWR = 2cycle-1 = 01b (tWR = 17ns)
+ 4 TRRD = 2cycle = 0b (tRRD = 14ns)
+ 3-1 TRAS = 5cycle-1 = 100b (Tras=42ns)
+ 1 CAS latency = 3cyc = 1b
+ (for Micron 2M32-7 operating at 100MHz)
+ */
boot_loader_write_mem32(pao, dsp_index, C6713_EMIF_SDRAMEXT,
0x001BDF29);
+
+ /* EMIF SDRAM control - set up for a 2Mx32 SDRAM (512x32x4 bank)
+ 31 - 0b -
+ 30 SDBSZ 1b 4 bank
+ 29..28 SDRSZ 00b 11 row address pins
+
+ 27..26 SDCSZ 01b 8 column address pins
+ 25 RFEN 1b refersh enabled
+ 24 INIT 1b init SDRAM!
+
+ 23..20 TRCD 0001b (Trcd/Tcyc)-1 = (20/10)-1 = 1
+
+ 19..16 TRP 0001b (Trp/Tcyc)-1 = (20/10)-1 = 1
+
+ 15..12 TRC 0110b (Trc/Tcyc)-1 = (70/10)-1 = 6
+
+ 11..0 - 0000b 0000b 0000b
+ */
boot_loader_write_mem32(pao, dsp_index, C6713_EMIF_SDRAMCTL,
- 0x47117000);
+ 0x47116000);
+
+ /* SDRAM refresh timing
+ Need 4,096 refresh cycles every 64ms = 15.625us = 1562cycles of 100MHz = 0x61A
+ */
boot_loader_write_mem32(pao, dsp_index,
C6713_EMIF_SDRAMTIMING, 0x00000410);
struct hpi_hw_obj *phw = pao->priv;
u32 data_transferred = 0;
u16 err = 0;
-#ifndef HPI6205_NO_HSR_POLL
- u32 time_out;
-#endif
u32 temp2;
struct bus_master_interface *interface = phw->p_interface_buffer;
if (!p_data)
- return HPI_ERROR_INVALID_DATA_TRANSFER;
+ return HPI_ERROR_INVALID_DATA_POINTER;
data_size &= ~3L; /* round data_size down to nearest 4 bytes */
interface->transfer_size_in_bytes = this_copy;
-#ifdef HPI6205_NO_HSR_POLL
/* DSP must change this back to nOperation */
interface->dsp_ack = H620_HIF_IDLE;
-#endif
-
send_dsp_command(phw, operation);
-#ifdef HPI6205_NO_HSR_POLL
temp2 = wait_dsp_ack(phw, operation, HPI6205_TIMEOUT);
HPI_DEBUG_LOG(DEBUG, "spun %d times for data xfer of %d\n",
HPI6205_TIMEOUT - temp2, this_copy);
break;
}
-#else
- /* spin waiting on the result */
- time_out = HPI6205_TIMEOUT;
- temp2 = 0;
- while ((temp2 == 0) && time_out--) {
- /* give 16k bus mastering transfer time to happen */
- /*(16k / 132Mbytes/s = 122usec) */
- hpios_delay_micro_seconds(20);
- temp2 = ioread32(phw->prHSR);
- temp2 &= C6205_HSR_INTSRC;
- }
- HPI_DEBUG_LOG(DEBUG, "spun %d times for data xfer of %d\n",
- HPI6205_TIMEOUT - time_out, this_copy);
- if (temp2 == C6205_HSR_INTSRC) {
- HPI_DEBUG_LOG(VERBOSE,
- "Interrupt from HIF <data> OK\n");
- /*
- if(interface->dwDspAck != nOperation) {
- HPI_DEBUG_LOG(DEBUG("interface->dwDspAck=%d,
- expected %d \n",
- interface->dwDspAck,nOperation);
- }
- */
- }
-/* need to handle this differently... */
- else {
- HPI_DEBUG_LOG(ERROR,
- "Interrupt from HIF <data> BAD\n");
- err = HPI_ERROR_DSP_HARDWARE;
- }
-
- /* reset the interrupt from the DSP */
- iowrite32(C6205_HSR_INTSRC, phw->prHSR);
-#endif
if (operation == H620_HIF_GET_DATA)
memcpy(&p_data[data_transferred],
(void *)&interface->u.b_data[0], this_copy);
static u16 message_response_sequence(struct hpi_adapter_obj *pao,
struct hpi_message *phm, struct hpi_response *phr)
{
-#ifndef HPI6205_NO_HSR_POLL
- u32 temp2;
-#endif
u32 time_out, time_out2;
struct hpi_hw_obj *phw = pao->priv;
struct bus_master_interface *interface = phw->p_interface_buffer;
message_count++;
if (phm->size > sizeof(interface->u)) {
- /* really MESSAGE buffer too small */
- phr->error = HPI_ERROR_RESPONSE_BUFFER_TOO_SMALL;
+ phr->error = HPI_ERROR_MESSAGE_BUFFER_TOO_SMALL;
phr->specific_error = sizeof(interface->u);
phr->size = sizeof(struct hpi_response_header);
HPI_DEBUG_LOG(ERROR,
- "message len %d too big for buffer %ld \n", phm->size,
+ "message len %d too big for buffer %zd \n", phm->size,
sizeof(interface->u));
return 0;
}
/* spin waiting on HIF interrupt flag (end of msg process) */
time_out = HPI6205_TIMEOUT;
-#ifndef HPI6205_NO_HSR_POLL
- temp2 = 0;
- while ((temp2 == 0) && --time_out) {
- temp2 = ioread32(phw->prHSR);
- temp2 &= C6205_HSR_INTSRC;
- hpios_delay_micro_seconds(1);
- }
- if (temp2 == C6205_HSR_INTSRC) {
- rmb(); /* ensure we see latest value for dsp_ack */
- if ((interface->dsp_ack != H620_HIF_GET_RESP)) {
- HPI_DEBUG_LOG(DEBUG,
- "(%u)interface->dsp_ack(0x%x) != "
- "H620_HIF_GET_RESP, t=%u\n", message_count,
- interface->dsp_ack,
- HPI6205_TIMEOUT - time_out);
- } else {
- HPI_DEBUG_LOG(VERBOSE,
- "(%u)int with GET_RESP after %u\n",
- message_count, HPI6205_TIMEOUT - time_out);
- }
-
- } else {
- /* can we do anything else in response to the error ? */
- HPI_DEBUG_LOG(ERROR,
- "Interrupt from HIF module BAD (function %x)\n",
- phm->function);
- }
-
- /* reset the interrupt from the DSP */
- iowrite32(C6205_HSR_INTSRC, phw->prHSR);
-#endif
-
/* read the result */
if (time_out) {
if (interface->u.response_buffer.size <= phr->size)
/* maybe an error response */
if (err) {
/* something failed in the HPI/DSP interface */
- phr->error = err;
+ if (err >= HPI_ERROR_BACKEND_BASE) {
+ phr->error = HPI_ERROR_DSP_COMMUNICATION;
+ phr->specific_error = err;
+ } else {
+ phr->error = err;
+ }
+
pao->dsp_crashed++;
/* just the header of the response is valid */
projects / linux-2.6-block.git / blobdiff