gpio: Move irqchip into struct gpio_irq_chip

[linux-block.git] / include / linux / gpio / driver.h

diff --git a/include/linux/gpio/driver.h b/include/linux/gpio/driver.h
index c97f8325e8bf5c2f4d309b1e8e82b69d62e68bfc..a79b3b18fadd050932bb4cd05bb5fc96fa94ea47 100644 (file)
--- a/include/linux/gpio/driver.h
+++ b/include/linux/gpio/driver.h
@@ -19,6 +19,48 @@ struct module;
 
 #ifdef CONFIG_GPIOLIB
 
+#ifdef CONFIG_GPIOLIB_IRQCHIP
+/**
+ * struct gpio_irq_chip - GPIO interrupt controller
+ */
+struct gpio_irq_chip {
+       /**
+        * @chip:
+        *
+        * GPIO IRQ chip implementation, provided by GPIO driver.
+        */
+       struct irq_chip *chip;
+
+       /**
+        * @domain_ops:
+        *
+        * Table of interrupt domain operations for this IRQ chip.
+        */
+       const struct irq_domain_ops *domain_ops;
+
+       /**
+        * @parent_handler:
+        *
+        * The interrupt handler for the GPIO chip's parent interrupts, may be
+        * NULL if the parent interrupts are nested rather than cascaded.
+        */
+       irq_flow_handler_t parent_handler;
+
+       /**
+        * @parent_handler_data:
+        *
+        * Data associated, and passed to, the handler for the parent
+        * interrupt.
+        */
+       void *parent_handler_data;
+};
+
+static inline struct gpio_irq_chip *to_gpio_irq_chip(struct irq_chip *chip)
+{
+       return container_of(chip, struct gpio_irq_chip, chip);
+}
+#endif
+
 /**
  * struct gpio_chip - abstract a GPIO controller
  * @label: a functional name for the GPIO device, such as a part
@@ -35,6 +77,8 @@ struct module;
  * @direction_input: configures signal "offset" as input, or returns error
  * @direction_output: configures signal "offset" as output, or returns error
  * @get: returns value for signal "offset", 0=low, 1=high, or negative error
+ * @get_multiple: reads values for multiple signals defined by "mask" and
+ *     stores them in "bits", returns 0 on success or negative error
  * @set: assigns output value for signal "offset"
  * @set_multiple: assigns output values for multiple signals defined by "mask"
  * @set_config: optional hook for all kinds of settings. Uses the same
@@ -65,9 +109,9 @@ struct module;
  *     registers.
  * @read_reg: reader function for generic GPIO
  * @write_reg: writer function for generic GPIO
- * @pin2mask: some generic GPIO controllers work with the big-endian bits
- *     notation, e.g. in a 8-bits register, GPIO7 is the least significant
- *     bit. This callback assigns the right bit mask.
+ * @be_bits: if the generic GPIO has big endian bit order (bit 31 is representing
+ *     line 0, bit 30 is line 1 ... bit 0 is line 31) this is set to true by the
+ *     generic GPIO core. It is for internal housekeeping only.
  * @reg_dat: data (in) register for generic GPIO
  * @reg_set: output set register (out=high) for generic GPIO
  * @reg_clr: output clear register (out=low) for generic GPIO
@@ -80,10 +124,8 @@ struct module;
  *     safely.
  * @bgpio_dir: shadowed direction register for generic GPIO to clear/set
  *     direction safely.
- * @irqchip: GPIO IRQ chip impl, provided by GPIO driver
  * @irqdomain: Interrupt translation domain; responsible for mapping
  *     between GPIO hwirq number and linux irq number
- * @irq_base: first linux IRQ number assigned to GPIO IRQ chip (deprecated)
  * @irq_handler: the irq handler to use (often a predefined irq core function)
  *     for GPIO IRQs, provided by GPIO driver
  * @irq_default_type: default IRQ triggering type applied during GPIO driver
@@ -126,6 +168,9 @@ struct gpio_chip {
                                                unsigned offset, int value);
        int                     (*get)(struct gpio_chip *chip,
                                                unsigned offset);
+       int                     (*get_multiple)(struct gpio_chip *chip,
+                                               unsigned long *mask,
+                                               unsigned long *bits);
        void                    (*set)(struct gpio_chip *chip,
                                                unsigned offset, int value);
        void                    (*set_multiple)(struct gpio_chip *chip,
@@ -147,7 +192,7 @@ struct gpio_chip {
 #if IS_ENABLED(CONFIG_GPIO_GENERIC)
        unsigned long (*read_reg)(void __iomem *reg);
        void (*write_reg)(void __iomem *reg, unsigned long data);
-       unsigned long (*pin2mask)(struct gpio_chip *gc, unsigned int pin);
+       bool be_bits;
        void __iomem *reg_dat;
        void __iomem *reg_set;
        void __iomem *reg_clr;
@@ -163,9 +208,7 @@ struct gpio_chip {
         * With CONFIG_GPIOLIB_IRQCHIP we get an irqchip inside the gpiolib
         * to handle IRQs for most practical cases.
         */
-       struct irq_chip         *irqchip;
        struct irq_domain       *irqdomain;
-       unsigned int            irq_base;
        irq_flow_handler_t      irq_handler;
        unsigned int            irq_default_type;
        unsigned int            irq_chained_parent;
@@ -173,6 +216,14 @@ struct gpio_chip {
        bool                    irq_need_valid_mask;
        unsigned long           *irq_valid_mask;
        struct lock_class_key   *lock_key;
+
+       /**
+        * @irq:
+        *
+        * Integrates interrupt chip functionality with the GPIO chip. Can be
+        * used to handle IRQs for most practical cases.
+        */
+       struct gpio_irq_chip irq;
 #endif
 
 #if defined(CONFIG_OF_GPIO)