net: hns3: clear reset interrupt status in hclge_irq_handle()

[linux-block.git] / drivers / net / ethernet / hisilicon / hns3 / hns3vf / hclgevf_main.c

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c
index 340d89eea2a80805444be8bb1d47b2cbaad6e96b..ce82b2b0f8f54684da201118549935d0cd511555 100644 (file)
--- a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c
@@ -1396,19 +1396,22 @@ static int hclgevf_reset_wait(struct hclgevf_dev *hdev)
        u32 val;
        int ret;
 
-       /* wait to check the hardware reset completion status */
-       val = hclgevf_read_dev(&hdev->hw, HCLGEVF_RST_ING);
-       dev_info(&hdev->pdev->dev, "checking vf resetting status: %x\n", val);
-
        if (hdev->reset_type == HNAE3_FLR_RESET)
                return hclgevf_flr_poll_timeout(hdev,
                                                HCLGEVF_RESET_WAIT_US,
                                                HCLGEVF_RESET_WAIT_CNT);
-
-       ret = readl_poll_timeout(hdev->hw.io_base + HCLGEVF_RST_ING, val,
-                                !(val & HCLGEVF_RST_ING_BITS),
-                                HCLGEVF_RESET_WAIT_US,
-                                HCLGEVF_RESET_WAIT_TIMEOUT_US);
+       else if (hdev->reset_type == HNAE3_VF_RESET)
+               ret = readl_poll_timeout(hdev->hw.io_base +
+                                        HCLGEVF_VF_RST_ING, val,
+                                        !(val & HCLGEVF_VF_RST_ING_BIT),
+                                        HCLGEVF_RESET_WAIT_US,
+                                        HCLGEVF_RESET_WAIT_TIMEOUT_US);
+       else
+               ret = readl_poll_timeout(hdev->hw.io_base +
+                                        HCLGEVF_RST_ING, val,
+                                        !(val & HCLGEVF_RST_ING_BITS),
+                                        HCLGEVF_RESET_WAIT_US,
+                                        HCLGEVF_RESET_WAIT_TIMEOUT_US);
 
        /* hardware completion status should be available by this time */
        if (ret) {
@@ -1886,7 +1889,7 @@ static void hclgevf_clear_event_cause(struct hclgevf_dev *hdev, u32 regclr)
 static enum hclgevf_evt_cause hclgevf_check_evt_cause(struct hclgevf_dev *hdev,
                                                      u32 *clearval)
 {
-       u32 cmdq_src_reg, rst_ing_reg;
+       u32 val, cmdq_src_reg, rst_ing_reg;
 
        /* fetch the events from their corresponding regs */
        cmdq_src_reg = hclgevf_read_dev(&hdev->hw,
@@ -1902,6 +1905,12 @@ static enum hclgevf_evt_cause hclgevf_check_evt_cause(struct hclgevf_dev *hdev,
                cmdq_src_reg &= ~BIT(HCLGEVF_VECTOR0_RST_INT_B);
                *clearval = cmdq_src_reg;
                hdev->rst_stats.vf_rst_cnt++;
+               /* set up VF hardware reset status, its PF will clear
+                * this status when PF has initialized done.
+                */
+               val = hclgevf_read_dev(&hdev->hw, HCLGEVF_VF_RST_ING);
+               hclgevf_write_dev(&hdev->hw, HCLGEVF_VF_RST_ING,
+                                 val | HCLGEVF_VF_RST_ING_BIT);
                return HCLGEVF_VECTOR0_EVENT_RST;
        }