cxgb4: Cleanup macros so they follow the same style and look consistent, part 2

[linux-2.6-block.git] / drivers / net / ethernet / chelsio / cxgb4 / cxgb4_uld.h

diff --git a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_uld.h b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_uld.h
index 1366ba620c87cdf506e1bd0757d7062cd5bf605e..4eba7cb1b89ce8d2142c940a8f3e2e315dce6629 100644 (file)
--- a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_uld.h
+++ b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_uld.h
@@ -52,10 +52,10 @@ enum {
 };
 
 #define INIT_TP_WR(w, tid) do { \
-       (w)->wr.wr_hi = htonl(FW_WR_OP(FW_TP_WR) | \
-                             FW_WR_IMMDLEN(sizeof(*w) - sizeof(w->wr))); \
-       (w)->wr.wr_mid = htonl(FW_WR_LEN16(DIV_ROUND_UP(sizeof(*w), 16)) | \
-                              FW_WR_FLOWID(tid)); \
+       (w)->wr.wr_hi = htonl(FW_WR_OP_V(FW_TP_WR) | \
+                             FW_WR_IMMDLEN_V(sizeof(*w) - sizeof(w->wr))); \
+       (w)->wr.wr_mid = htonl(FW_WR_LEN16_V(DIV_ROUND_UP(sizeof(*w), 16)) | \
+                              FW_WR_FLOWID_V(tid)); \
        (w)->wr.wr_lo = cpu_to_be64(0); \
 } while (0)
 
@@ -65,9 +65,10 @@ enum {
 } while (0)
 
 #define INIT_ULPTX_WR(w, wrlen, atomic, tid) do { \
-       (w)->wr.wr_hi = htonl(FW_WR_OP(FW_ULPTX_WR) | FW_WR_ATOMIC(atomic)); \
-       (w)->wr.wr_mid = htonl(FW_WR_LEN16(DIV_ROUND_UP(wrlen, 16)) | \
-                              FW_WR_FLOWID(tid)); \
+       (w)->wr.wr_hi = htonl(FW_WR_OP_V(FW_ULPTX_WR) | \
+                             FW_WR_ATOMIC_V(atomic)); \
+       (w)->wr.wr_mid = htonl(FW_WR_LEN16_V(DIV_ROUND_UP(wrlen, 16)) | \
+                              FW_WR_FLOWID_V(tid)); \
        (w)->wr.wr_lo = cpu_to_be64(0); \
 } while (0)