mtd: rawnand: Pass a nand_chip object to ecc->correct()

[linux-2.6-block.git] / drivers / mtd / nand / raw / fsmc_nand.c

diff --git a/drivers/mtd/nand/raw/fsmc_nand.c b/drivers/mtd/nand/raw/fsmc_nand.c
index f418236fa020adfdbd502efbc494c8ef66f90154..b41fd09fa389fca9cd9fa391651a9b21b4143bbd 100644 (file)
--- a/drivers/mtd/nand/raw/fsmc_nand.c
+++ b/drivers/mtd/nand/raw/fsmc_nand.c
@@ -368,9 +368,9 @@ static int fsmc_setup_data_interface(struct mtd_info *mtd, int csline,
 /*
  * fsmc_enable_hwecc - Enables Hardware ECC through FSMC registers
  */
-static void fsmc_enable_hwecc(struct mtd_info *mtd, int mode)
+static void fsmc_enable_hwecc(struct nand_chip *chip, int mode)
 {
-       struct fsmc_nand_data *host = mtd_to_fsmc(mtd);
+       struct fsmc_nand_data *host = mtd_to_fsmc(nand_to_mtd(chip));
 
        writel_relaxed(readl(host->regs_va + FSMC_PC) & ~FSMC_ECCPLEN_256,
                       host->regs_va + FSMC_PC);
@@ -385,10 +385,10 @@ static void fsmc_enable_hwecc(struct mtd_info *mtd, int mode)
  * FSMC. ECC is 13 bytes for 512 bytes of data (supports error correction up to
  * max of 8-bits)
  */
-static int fsmc_read_hwecc_ecc4(struct mtd_info *mtd, const uint8_t *data,
+static int fsmc_read_hwecc_ecc4(struct nand_chip *chip, const uint8_t *data,
                                uint8_t *ecc)
 {
-       struct fsmc_nand_data *host = mtd_to_fsmc(mtd);
+       struct fsmc_nand_data *host = mtd_to_fsmc(nand_to_mtd(chip));
        uint32_t ecc_tmp;
        unsigned long deadline = jiffies + FSMC_BUSY_WAIT_TIMEOUT;
 
@@ -433,10 +433,10 @@ static int fsmc_read_hwecc_ecc4(struct mtd_info *mtd, const uint8_t *data,
  * FSMC. ECC is 3 bytes for 512 bytes of data (supports error correction up to
  * max of 1-bit)
  */
-static int fsmc_read_hwecc_ecc1(struct mtd_info *mtd, const uint8_t *data,
+static int fsmc_read_hwecc_ecc1(struct nand_chip *chip, const uint8_t *data,
                                uint8_t *ecc)
 {
-       struct fsmc_nand_data *host = mtd_to_fsmc(mtd);
+       struct fsmc_nand_data *host = mtd_to_fsmc(nand_to_mtd(chip));
        uint32_t ecc_tmp;
 
        ecc_tmp = readl_relaxed(host->regs_va + ECC1);
@@ -740,7 +740,7 @@ static int fsmc_read_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip,
 
        for (i = 0, s = 0; s < eccsteps; s++, i += eccbytes, p += eccsize) {
                nand_read_page_op(chip, page, s * eccsize, NULL, 0);
-               chip->ecc.hwctl(mtd, NAND_ECC_READ);
+               chip->ecc.hwctl(chip, NAND_ECC_READ);
                nand_read_data_op(chip, p, eccsize, false);
 
                for (j = 0; j < eccbytes;) {
@@ -767,9 +767,9 @@ static int fsmc_read_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip,
                }
 
                memcpy(&ecc_code[i], oob, chip->ecc.bytes);
-               chip->ecc.calculate(mtd, p, &ecc_calc[i]);
+               chip->ecc.calculate(chip, p, &ecc_calc[i]);
 
-               stat = chip->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]);
+               stat = chip->ecc.correct(chip, p, &ecc_code[i], &ecc_calc[i]);
                if (stat < 0) {
                        mtd->ecc_stats.failed++;
                } else {
@@ -791,11 +791,10 @@ static int fsmc_read_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip,
  * calc_ecc is a 104 bit information containing maximum of 8 error
  * offset informations of 13 bits each in 512 bytes of read data.
  */
-static int fsmc_bch8_correct_data(struct mtd_info *mtd, uint8_t *dat,
-                            uint8_t *read_ecc, uint8_t *calc_ecc)
+static int fsmc_bch8_correct_data(struct nand_chip *chip, uint8_t *dat,
+                                 uint8_t *read_ecc, uint8_t *calc_ecc)
 {
-       struct nand_chip *chip = mtd_to_nand(mtd);
-       struct fsmc_nand_data *host = mtd_to_fsmc(mtd);
+       struct fsmc_nand_data *host = mtd_to_fsmc(nand_to_mtd(chip));
        uint32_t err_idx[8];
        uint32_t num_err, i;
        uint32_t ecc1, ecc2, ecc3, ecc4;
@@ -1125,7 +1124,7 @@ static int __init fsmc_nand_probe(struct platform_device *pdev)
         * Scan to find existence of the device
         */
        nand->dummy_controller.ops = &fsmc_nand_controller_ops;
-       ret = nand_scan(mtd, 1);
+       ret = nand_scan(nand, 1);
        if (ret)
                goto release_dma_write_chan;
 
@@ -1161,7 +1160,7 @@ static int fsmc_nand_remove(struct platform_device *pdev)
        struct fsmc_nand_data *host = platform_get_drvdata(pdev);
 
        if (host) {
-               nand_release(nand_to_mtd(&host->nand));
+               nand_release(&host->nand);
 
                if (host->mode == USE_DMA_ACCESS) {
                        dma_release_channel(host->write_dma_chan);