drm/radeon: replace pflip and sw_int counters with atomics
[linux-2.6-block.git] / drivers / gpu / drm / radeon / r100.c
index e8fe4ae3bc232ea2099369ba43e354fef6482c87..35825bf1e7904aebd327ff4ca0382ad5ddfb908d 100644 (file)
@@ -689,18 +689,18 @@ int r100_irq_set(struct radeon_device *rdev)
                WREG32(R_000040_GEN_INT_CNTL, 0);
                return -EINVAL;
        }
-       if (rdev->irq.sw_int[RADEON_RING_TYPE_GFX_INDEX]) {
+       if (atomic_read(&rdev->irq.ring_int[RADEON_RING_TYPE_GFX_INDEX])) {
                tmp |= RADEON_SW_INT_ENABLE;
        }
        if (rdev->irq.gui_idle) {
                tmp |= RADEON_GUI_IDLE_MASK;
        }
        if (rdev->irq.crtc_vblank_int[0] ||
-           rdev->irq.pflip[0]) {
+           atomic_read(&rdev->irq.pflip[0])) {
                tmp |= RADEON_CRTC_VBLANK_MASK;
        }
        if (rdev->irq.crtc_vblank_int[1] ||
-           rdev->irq.pflip[1]) {
+           atomic_read(&rdev->irq.pflip[1])) {
                tmp |= RADEON_CRTC2_VBLANK_MASK;
        }
        if (rdev->irq.hpd[0]) {
@@ -775,7 +775,7 @@ int r100_irq_process(struct radeon_device *rdev)
                                rdev->pm.vblank_sync = true;
                                wake_up(&rdev->irq.vblank_queue);
                        }
-                       if (rdev->irq.pflip[0])
+                       if (atomic_read(&rdev->irq.pflip[0]))
                                radeon_crtc_handle_flip(rdev, 0);
                }
                if (status & RADEON_CRTC2_VBLANK_STAT) {
@@ -784,7 +784,7 @@ int r100_irq_process(struct radeon_device *rdev)
                                rdev->pm.vblank_sync = true;
                                wake_up(&rdev->irq.vblank_queue);
                        }
-                       if (rdev->irq.pflip[1])
+                       if (atomic_read(&rdev->irq.pflip[1]))
                                radeon_crtc_handle_flip(rdev, 1);
                }
                if (status & RADEON_FP_DETECT_STAT) {