drm/radeon: replace pflip and sw_int counters with atomics

[linux-2.6-block.git] / drivers / gpu / drm / radeon / evergreen.c

diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c
index bdc1f30d7474f9883fb449a3c2fef8e64f4e62ef..f716e081c813c06dbd911391d7cd4527f3e667c4 100644 (file)
--- a/drivers/gpu/drm/radeon/evergreen.c
+++ b/drivers/gpu/drm/radeon/evergreen.c
@@ -2340,20 +2340,20 @@ int evergreen_irq_set(struct radeon_device *rdev)
 
        if (rdev->family >= CHIP_CAYMAN) {
                /* enable CP interrupts on all rings */
-               if (rdev->irq.sw_int[RADEON_RING_TYPE_GFX_INDEX]) {
+               if (atomic_read(&rdev->irq.ring_int[RADEON_RING_TYPE_GFX_INDEX])) {
                        DRM_DEBUG("evergreen_irq_set: sw int gfx\n");
                        cp_int_cntl |= TIME_STAMP_INT_ENABLE;
                }
-               if (rdev->irq.sw_int[CAYMAN_RING_TYPE_CP1_INDEX]) {
+               if (atomic_read(&rdev->irq.ring_int[CAYMAN_RING_TYPE_CP1_INDEX])) {
                        DRM_DEBUG("evergreen_irq_set: sw int cp1\n");
                        cp_int_cntl1 |= TIME_STAMP_INT_ENABLE;
                }
-               if (rdev->irq.sw_int[CAYMAN_RING_TYPE_CP2_INDEX]) {
+               if (atomic_read(&rdev->irq.ring_int[CAYMAN_RING_TYPE_CP2_INDEX])) {
                        DRM_DEBUG("evergreen_irq_set: sw int cp2\n");
                        cp_int_cntl2 |= TIME_STAMP_INT_ENABLE;
                }
        } else {
-               if (rdev->irq.sw_int[RADEON_RING_TYPE_GFX_INDEX]) {
+               if (atomic_read(&rdev->irq.ring_int[RADEON_RING_TYPE_GFX_INDEX])) {
                        DRM_DEBUG("evergreen_irq_set: sw int gfx\n");
                        cp_int_cntl |= RB_INT_ENABLE;
                        cp_int_cntl |= TIME_STAMP_INT_ENABLE;
@@ -2361,32 +2361,32 @@ int evergreen_irq_set(struct radeon_device *rdev)
        }
 
        if (rdev->irq.crtc_vblank_int[0] ||
-           rdev->irq.pflip[0]) {
+           atomic_read(&rdev->irq.pflip[0])) {
                DRM_DEBUG("evergreen_irq_set: vblank 0\n");
                crtc1 |= VBLANK_INT_MASK;
        }
        if (rdev->irq.crtc_vblank_int[1] ||
-           rdev->irq.pflip[1]) {
+           atomic_read(&rdev->irq.pflip[1])) {
                DRM_DEBUG("evergreen_irq_set: vblank 1\n");
                crtc2 |= VBLANK_INT_MASK;
        }
        if (rdev->irq.crtc_vblank_int[2] ||
-           rdev->irq.pflip[2]) {
+           atomic_read(&rdev->irq.pflip[2])) {
                DRM_DEBUG("evergreen_irq_set: vblank 2\n");
                crtc3 |= VBLANK_INT_MASK;
        }
        if (rdev->irq.crtc_vblank_int[3] ||
-           rdev->irq.pflip[3]) {
+           atomic_read(&rdev->irq.pflip[3])) {
                DRM_DEBUG("evergreen_irq_set: vblank 3\n");
                crtc4 |= VBLANK_INT_MASK;
        }
        if (rdev->irq.crtc_vblank_int[4] ||
-           rdev->irq.pflip[4]) {
+           atomic_read(&rdev->irq.pflip[4])) {
                DRM_DEBUG("evergreen_irq_set: vblank 4\n");
                crtc5 |= VBLANK_INT_MASK;
        }
        if (rdev->irq.crtc_vblank_int[5] ||
-           rdev->irq.pflip[5]) {
+           atomic_read(&rdev->irq.pflip[5])) {
                DRM_DEBUG("evergreen_irq_set: vblank 5\n");
                crtc6 |= VBLANK_INT_MASK;
        }
@@ -2706,7 +2706,7 @@ restart_ih:
                                                rdev->pm.vblank_sync = true;
                                                wake_up(&rdev->irq.vblank_queue);
                                        }
-                                       if (rdev->irq.pflip[0])
+                                       if (atomic_read(&rdev->irq.pflip[0]))
                                                radeon_crtc_handle_flip(rdev, 0);
                                        rdev->irq.stat_regs.evergreen.disp_int &= ~LB_D1_VBLANK_INTERRUPT;
                                        DRM_DEBUG("IH: D1 vblank\n");
@@ -2732,7 +2732,7 @@ restart_ih:
                                                rdev->pm.vblank_sync = true;
                                                wake_up(&rdev->irq.vblank_queue);
                                        }
-                                       if (rdev->irq.pflip[1])
+                                       if (atomic_read(&rdev->irq.pflip[1]))
                                                radeon_crtc_handle_flip(rdev, 1);
                                        rdev->irq.stat_regs.evergreen.disp_int_cont &= ~LB_D2_VBLANK_INTERRUPT;
                                        DRM_DEBUG("IH: D2 vblank\n");
@@ -2758,7 +2758,7 @@ restart_ih:
                                                rdev->pm.vblank_sync = true;
                                                wake_up(&rdev->irq.vblank_queue);
                                        }
-                                       if (rdev->irq.pflip[2])
+                                       if (atomic_read(&rdev->irq.pflip[2]))
                                                radeon_crtc_handle_flip(rdev, 2);
                                        rdev->irq.stat_regs.evergreen.disp_int_cont2 &= ~LB_D3_VBLANK_INTERRUPT;
                                        DRM_DEBUG("IH: D3 vblank\n");
@@ -2784,7 +2784,7 @@ restart_ih:
                                                rdev->pm.vblank_sync = true;
                                                wake_up(&rdev->irq.vblank_queue);
                                        }
-                                       if (rdev->irq.pflip[3])
+                                       if (atomic_read(&rdev->irq.pflip[3]))
                                                radeon_crtc_handle_flip(rdev, 3);
                                        rdev->irq.stat_regs.evergreen.disp_int_cont3 &= ~LB_D4_VBLANK_INTERRUPT;
                                        DRM_DEBUG("IH: D4 vblank\n");
@@ -2810,7 +2810,7 @@ restart_ih:
                                                rdev->pm.vblank_sync = true;
                                                wake_up(&rdev->irq.vblank_queue);
                                        }
-                                       if (rdev->irq.pflip[4])
+                                       if (atomic_read(&rdev->irq.pflip[4]))
                                                radeon_crtc_handle_flip(rdev, 4);
                                        rdev->irq.stat_regs.evergreen.disp_int_cont4 &= ~LB_D5_VBLANK_INTERRUPT;
                                        DRM_DEBUG("IH: D5 vblank\n");
@@ -2836,7 +2836,7 @@ restart_ih:
                                                rdev->pm.vblank_sync = true;
                                                wake_up(&rdev->irq.vblank_queue);
                                        }
-                                       if (rdev->irq.pflip[5])
+                                       if (atomic_read(&rdev->irq.pflip[5]))
                                                radeon_crtc_handle_flip(rdev, 5);
                                        rdev->irq.stat_regs.evergreen.disp_int_cont5 &= ~LB_D6_VBLANK_INTERRUPT;
                                        DRM_DEBUG("IH: D6 vblank\n");