Merge tag 'drm-intel-gt-next-2022-09-16' of git://anongit.freedesktop.org/drm/drm...
[linux-2.6-block.git] / drivers / gpu / drm / i915 / intel_device_info.h
index c4373f44c2738e74b0e3adfc163b6f3330b53146..deaa07d8df2c14eeb6d062ea768325f86a5bdf61 100644 (file)
@@ -37,6 +37,7 @@
 
 struct drm_printer;
 struct drm_i915_private;
+struct intel_gt_definition;
 
 /* Keep in gen based order, and chronological order within a gen */
 enum intel_platform {
@@ -164,7 +165,6 @@ enum intel_ppgtt_type {
        func(has_media_ratio_mode); \
        func(has_mslice_steering); \
        func(has_one_eu_per_fuse_bit); \
-       func(has_pooled_eu); \
        func(has_pxp); \
        func(has_rc6); \
        func(has_rc6p); \
@@ -172,6 +172,7 @@ enum intel_ppgtt_type {
        func(has_runtime_pm); \
        func(has_snoop); \
        func(has_coherent_ggtt); \
+       func(tuning_thread_rr_after_dep); \
        func(unfenced_needs_alignment); \
        func(hws_needs_physical);
 
@@ -179,14 +180,11 @@ enum intel_ppgtt_type {
        /* Keep in alphabetical order */ \
        func(cursor_needs_physical); \
        func(has_cdclk_crawl); \
-       func(has_dmc); \
        func(has_ddi); \
        func(has_dp_mst); \
        func(has_dsb); \
-       func(has_dsc); \
        func(has_fpga_dbg); \
        func(has_gmch); \
-       func(has_hdcp); \
        func(has_hotplug); \
        func(has_hti); \
        func(has_ipc); \
@@ -217,29 +215,45 @@ struct intel_runtime_info {
 
        u16 device_id;
 
-       u8 num_sprites[I915_MAX_PIPES];
-       u8 num_scalers[I915_MAX_PIPES];
+       intel_engine_mask_t platform_engine_mask; /* Engines supported by the HW */
 
        u32 rawclk_freq;
 
        struct intel_step_info step;
+
+       unsigned int page_sizes; /* page sizes supported by the HW */
+
+       enum intel_ppgtt_type ppgtt_type;
+       unsigned int ppgtt_size; /* log2, e.g. 31/32/48 bits */
+
+       u32 memory_regions; /* regions supported by the HW */
+
+       bool has_pooled_eu;
+
+       /* display */
+       struct {
+               u8 pipe_mask;
+               u8 cpu_transcoder_mask;
+
+               u8 num_sprites[I915_MAX_PIPES];
+               u8 num_scalers[I915_MAX_PIPES];
+
+               u8 fbc_mask;
+
+               bool has_hdcp;
+               bool has_dmc;
+               bool has_dsc;
+       };
 };
 
 struct intel_device_info {
        struct ip_version media;
 
-       intel_engine_mask_t platform_engine_mask; /* Engines supported by the HW */
-
        enum intel_platform platform;
 
        unsigned int dma_mask_size; /* available DMA address bits */
 
-       enum intel_ppgtt_type ppgtt_type;
-       unsigned int ppgtt_size; /* log2, e.g. 31/32/48 bits */
-
-       unsigned int page_sizes; /* page sizes supported by the HW */
-
-       u32 memory_regions; /* regions supported by the HW */
+       const struct intel_gt_definition *extra_gt_list;
 
        u8 gt; /* GT number, 0 if undefined */
 
@@ -251,9 +265,6 @@ struct intel_device_info {
                u8 ver;
                u8 rel;
 
-               u8 pipe_mask;
-               u8 cpu_transcoder_mask;
-               u8 fbc_mask;
                u8 abox_mask;
 
                struct {