Merge tag 'drm-intel-gt-next-2023-03-16' of git://anongit.freedesktop.org/drm/drm...

[linux-block.git] / drivers / gpu / drm / i915 / i915_reg.h

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 9f4e4c3d6159d83a26d56027b15b9cee90ab2a6e..34b7d2ac33fb0c6e7a135568882ddda181bf3852 100644 (file)
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -2379,18 +2379,7 @@
 #define CRT_HOTPLUG_DETECT_VOLTAGE_475MV       (1 << 2)
 
 #define PORT_HOTPLUG_STAT      _MMIO(DISPLAY_MMIO_BASE(dev_priv) + 0x61114)
-/*
- * HDMI/DP bits are g4x+
- *
- * WARNING: Bspec for hpd status bits on gen4 seems to be completely confused.
- * Please check the detailed lore in the commit message for for experimental
- * evidence.
- */
-/* Bspec says GM45 should match G4X/VLV/CHV, but reality disagrees */
-#define   PORTD_HOTPLUG_LIVE_STATUS_GM45       (1 << 29)
-#define   PORTC_HOTPLUG_LIVE_STATUS_GM45       (1 << 28)
-#define   PORTB_HOTPLUG_LIVE_STATUS_GM45       (1 << 27)
-/* G4X/VLV/CHV DP/HDMI bits again match Bspec */
+/* HDMI/DP bits are g4x+ */
 #define   PORTD_HOTPLUG_LIVE_STATUS_G4X                (1 << 27)
 #define   PORTC_HOTPLUG_LIVE_STATUS_G4X                (1 << 28)
 #define   PORTB_HOTPLUG_LIVE_STATUS_G4X                (1 << 29)
@@ -6469,15 +6458,6 @@
 /*   XEHP_PCODE_FREQUENCY_CONFIG param2 */
 #define     PCODE_MBOX_DOMAIN_NONE             0x0
 #define     PCODE_MBOX_DOMAIN_MEDIAFF          0x3
-
-/* Wa_14017210380: mtl */
-#define   PCODE_MBOX_GT_STATE                  0x50
-/* sub-commands (param1) */
-#define     PCODE_MBOX_GT_STATE_MEDIA_BUSY     0x1
-#define     PCODE_MBOX_GT_STATE_MEDIA_NOT_BUSY 0x2
-/* param2 */
-#define     PCODE_MBOX_GT_STATE_DOMAIN_MEDIA   0x1
-
 #define GEN6_PCODE_DATA                                _MMIO(0x138128)
 #define   GEN6_PCODE_FREQ_IA_RATIO_SHIFT       8
 #define   GEN6_PCODE_FREQ_RING_RATIO_SHIFT     16
@@ -7686,10 +7666,6 @@ enum skl_power_gate {
 #define CLKGATE_DIS_MISC                       _MMIO(0x46534)
 #define  CLKGATE_DIS_MISC_DMASC_GATING_DIS     REG_BIT(21)
 
-#define GEN12_CULLBIT1                 _MMIO(0x6100)
-#define GEN12_CULLBIT2                 _MMIO(0x7030)
-#define GEN12_STATE_ACK_DEBUG          _MMIO(0x20BC)
-
 #define _MTL_CLKGATE_DIS_TRANS_A                       0x604E8
 #define _MTL_CLKGATE_DIS_TRANS_B                       0x614E8
 #define MTL_CLKGATE_DIS_TRANS(trans)                   _MMIO_TRANS2(trans, _MTL_CLKGATE_DIS_TRANS_A)