Merge tag 'drm-intel-next-2012-02-07' of git://people.freedesktop.org/~danvet/drm...
[linux-2.6-block.git] / drivers / gpu / drm / i915 / i915_drv.h
index 32737a37edd0c31f02b2b5a2637e259e0a7886d3..68a5338ea8672cb7693741620ad40cda278174ae 100644 (file)
@@ -135,6 +135,7 @@ struct drm_i915_fence_reg {
        struct list_head lru_list;
        struct drm_i915_gem_object *obj;
        uint32_t setup_seqno;
+       int pin_count;
 };
 
 struct sdvo_device_mapping {
@@ -152,26 +153,21 @@ struct drm_i915_error_state {
        u32 eir;
        u32 pgtbl_er;
        u32 pipestat[I915_MAX_PIPES];
-       u32 ipeir;
-       u32 ipehr;
-       u32 instdone;
-       u32 acthd;
+       u32 tail[I915_NUM_RINGS];
+       u32 head[I915_NUM_RINGS];
+       u32 ipeir[I915_NUM_RINGS];
+       u32 ipehr[I915_NUM_RINGS];
+       u32 instdone[I915_NUM_RINGS];
+       u32 acthd[I915_NUM_RINGS];
        u32 error; /* gen6+ */
-       u32 bcs_acthd; /* gen6+ blt engine */
-       u32 bcs_ipehr;
-       u32 bcs_ipeir;
-       u32 bcs_instdone;
-       u32 bcs_seqno;
-       u32 vcs_acthd; /* gen6+ bsd engine */
-       u32 vcs_ipehr;
-       u32 vcs_ipeir;
-       u32 vcs_instdone;
-       u32 vcs_seqno;
-       u32 instpm;
-       u32 instps;
+       u32 instpm[I915_NUM_RINGS];
+       u32 instps[I915_NUM_RINGS];
        u32 instdone1;
-       u32 seqno;
+       u32 seqno[I915_NUM_RINGS];
        u64 bbaddr;
+       u32 fault_reg[I915_NUM_RINGS];
+       u32 done_reg;
+       u32 faddr[I915_NUM_RINGS];
        u64 fence[I915_MAX_NUM_FENCES];
        struct timeval time;
        struct drm_i915_error_object {
@@ -1170,6 +1166,24 @@ int __must_check i915_gem_object_get_fence(struct drm_i915_gem_object *obj,
                                           struct intel_ring_buffer *pipelined);
 int __must_check i915_gem_object_put_fence(struct drm_i915_gem_object *obj);
 
+static inline void
+i915_gem_object_pin_fence(struct drm_i915_gem_object *obj)
+{
+       if (obj->fence_reg != I915_FENCE_REG_NONE) {
+               struct drm_i915_private *dev_priv = obj->base.dev->dev_private;
+               dev_priv->fence_regs[obj->fence_reg].pin_count++;
+       }
+}
+
+static inline void
+i915_gem_object_unpin_fence(struct drm_i915_gem_object *obj)
+{
+       if (obj->fence_reg != I915_FENCE_REG_NONE) {
+               struct drm_i915_private *dev_priv = obj->base.dev->dev_private;
+               dev_priv->fence_regs[obj->fence_reg].pin_count--;
+       }
+}
+
 void i915_gem_retire_requests(struct drm_device *dev);
 void i915_gem_reset(struct drm_device *dev);
 void i915_gem_clflush_object(struct drm_i915_gem_object *obj);
@@ -1183,13 +1197,14 @@ void i915_gem_do_init(struct drm_device *dev,
                      unsigned long start,
                      unsigned long mappable_end,
                      unsigned long end);
-int __must_check i915_gpu_idle(struct drm_device *dev);
+int __must_check i915_gpu_idle(struct drm_device *dev, bool do_retire);
 int __must_check i915_gem_idle(struct drm_device *dev);
 int __must_check i915_add_request(struct intel_ring_buffer *ring,
                                  struct drm_file *file,
                                  struct drm_i915_gem_request *request);
 int __must_check i915_wait_request(struct intel_ring_buffer *ring,
-                                  uint32_t seqno);
+                                  uint32_t seqno,
+                                  bool do_retire);
 int i915_gem_fault(struct vm_area_struct *vma, struct vm_fault *vmf);
 int __must_check
 i915_gem_object_set_to_gtt_domain(struct drm_i915_gem_object *obj,