Merge tag 'gvt-next-2020-04-22' of https://github.com/intel/gvt-linux into drm-intel...

[linux-block.git] / drivers / gpu / drm / i915 / gvt / gtt.c

diff --git a/drivers/gpu/drm/i915/gvt/gtt.c b/drivers/gpu/drm/i915/gvt/gtt.c
index 2a4b23f8aa740e7b6a17d2650509e8ae34456aa2..d2b0d85b39bcb400f1d6b8a98ee5e576f831c08d 100644 (file)
--- a/drivers/gpu/drm/i915/gvt/gtt.c
+++ b/drivers/gpu/drm/i915/gvt/gtt.c
@@ -2341,12 +2341,27 @@ int intel_vgpu_emulate_ggtt_mmio_write(struct intel_vgpu *vgpu,
 {
        const struct intel_gvt_device_info *info = &vgpu->gvt->device_info;
        int ret;
+       struct intel_vgpu_submission *s = &vgpu->submission;
+       struct intel_engine_cs *engine;
+       int i;
 
        if (bytes != 4 && bytes != 8)
                return -EINVAL;
 
        off -= info->gtt_start_offset;
        ret = emulate_ggtt_mmio_write(vgpu, off, p_data, bytes);
+
+       /* if ggtt of last submitted context is written,
+        * that context is probably got unpinned.
+        * Set last shadowed ctx to invalid.
+        */
+       for_each_engine(engine, vgpu->gvt->gt, i) {
+               if (!s->last_ctx[i].valid)
+                       continue;
+
+               if (s->last_ctx[i].lrca == (off >> info->gtt_entry_size_shift))
+                       s->last_ctx[i].valid = false;
+       }
        return ret;
 }