drm/i915/gt: Split intel_ring_submission

[linux-2.6-block.git] / drivers / gpu / drm / i915 / gt / uc / intel_guc_submission.c

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
index f325d3dd564fffab80dd96cfceb29364ae924a67..1b1691aaed2881aabaa9e19b7c46574e9fd6f81e 100644 (file)
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
@@ -6,12 +6,13 @@
 #include <linux/circ_buf.h>
 
 #include "gem/i915_gem_context.h"
-
 #include "gt/intel_context.h"
 #include "gt/intel_engine_pm.h"
 #include "gt/intel_gt.h"
 #include "gt/intel_gt_pm.h"
 #include "gt/intel_lrc_reg.h"
+#include "gt/intel_ring.h"
+
 #include "intel_guc_submission.h"
 
 #include "i915_drv.h"
@@ -29,6 +30,12 @@ enum {
 /**
  * DOC: GuC-based command submission
  *
+ * IMPORTANT NOTE: GuC submission is currently not supported in i915. The GuC
+ * firmware is moving to an updated submission interface and we plan to
+ * turn submission back on when that lands. The below documentation (and related
+ * code) matches the old submission model and will be updated as part of the
+ * upgrade to the new flow.
+ *
  * GuC client:
  * A intel_guc_client refers to a submission path through GuC. Currently, there
  * is only one client, which is charged with all submissions to the GuC. This
@@ -1014,7 +1021,7 @@ static void guc_interrupts_capture(struct intel_gt *gt)
         * to GuC
         */
        irqs = _MASKED_BIT_ENABLE(GFX_INTERRUPT_STEERING);
-       for_each_engine(engine, gt->i915, id)
+       for_each_engine(engine, gt, id)
                ENGINE_WRITE(engine, RING_MODE_GEN7, irqs);
 
        /* route USER_INTERRUPT to Host, all others are sent to GuC. */
@@ -1062,7 +1069,7 @@ static void guc_interrupts_release(struct intel_gt *gt)
         */
        irqs = _MASKED_FIELD(GFX_FORWARD_VBLANK_MASK, GFX_FORWARD_VBLANK_NEVER);
        irqs |= _MASKED_BIT_DISABLE(GFX_INTERRUPT_STEERING);
-       for_each_engine(engine, gt->i915, id)
+       for_each_engine(engine, gt, id)
                ENGINE_WRITE(engine, RING_MODE_GEN7, irqs);
 
        /* route all GT interrupts to the host */
@@ -1145,7 +1152,7 @@ int intel_guc_submission_enable(struct intel_guc *guc)
        /* Take over from manual control of ELSP (execlists) */
        guc_interrupts_capture(gt);
 
-       for_each_engine(engine, gt->i915, id) {
+       for_each_engine(engine, gt, id) {
                engine->set_default_submission = guc_set_default_submission;
                engine->set_default_submission(engine);
        }