Merge tag 'drm-intel-next-2022-06-22' of git://anongit.freedesktop.org/drm/drm-intel...

[linux-block.git] / drivers / gpu / drm / i915 / display / intel_display_types.h

diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index a0ec5b02b80b8d0d8a26f29f8452d29641aaf4f2..0da9b208d56e8b4d7449a936fe1e3e4b78279ada 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -280,6 +280,76 @@ struct intel_panel_bl_funcs {
        u32 (*hz_to_pwm)(struct intel_connector *connector, u32 hz);
 };
 
+enum drrs_type {
+       DRRS_TYPE_NONE,
+       DRRS_TYPE_STATIC,
+       DRRS_TYPE_SEAMLESS,
+};
+
+struct intel_vbt_panel_data {
+       struct drm_display_mode *lfp_lvds_vbt_mode; /* if any */
+       struct drm_display_mode *sdvo_lvds_vbt_mode; /* if any */
+
+       /* Feature bits */
+       unsigned int panel_type:4;
+       unsigned int lvds_dither:1;
+       unsigned int bios_lvds_val; /* initial [PCH_]LVDS reg val in VBIOS */
+
+       bool vrr;
+
+       u8 seamless_drrs_min_refresh_rate;
+       enum drrs_type drrs_type;
+
+       struct {
+               int max_link_rate;
+               int rate;
+               int lanes;
+               int preemphasis;
+               int vswing;
+               int bpp;
+               struct edp_power_seq pps;
+               u8 drrs_msa_timing_delay;
+               bool low_vswing;
+               bool initialized;
+               bool hobl;
+       } edp;
+
+       struct {
+               bool enable;
+               bool full_link;
+               bool require_aux_wakeup;
+               int idle_frames;
+               int tp1_wakeup_time_us;
+               int tp2_tp3_wakeup_time_us;
+               int psr2_tp2_tp3_wakeup_time_us;
+       } psr;
+
+       struct {
+               u16 pwm_freq_hz;
+               u16 brightness_precision_bits;
+               bool present;
+               bool active_low_pwm;
+               u8 min_brightness;      /* min_brightness/255 of max */
+               u8 controller;          /* brightness controller number */
+               enum intel_backlight_type type;
+       } backlight;
+
+       /* MIPI DSI */
+       struct {
+               u16 panel_id;
+               struct mipi_config *config;
+               struct mipi_pps_data *pps;
+               u16 bl_ports;
+               u16 cabc_ports;
+               u8 seq_version;
+               u32 size;
+               u8 *data;
+               const u8 *sequence[MIPI_SEQ_MAX];
+               u8 *deassert_seq; /* Used by fixup_mipi_sequences() */
+               enum drm_panel_orientation orientation;
+       } dsi;
+};
+
 struct intel_panel {
        struct list_head fixed_modes;
 
@@ -319,6 +389,8 @@ struct intel_panel {
                const struct intel_panel_bl_funcs *pwm_funcs;
                void (*power)(struct intel_connector *, bool enable);
        } backlight;
+
+       struct intel_vbt_panel_data vbt;
 };
 
 struct intel_digital_port;
@@ -1475,6 +1547,7 @@ struct intel_pps {
        int backlight_off_delay;
        struct delayed_work panel_vdd_work;
        bool want_panel_vdd;
+       bool initializing;
        unsigned long last_power_on;
        unsigned long last_backlight_off;
        ktime_t panel_power_off_time;
@@ -1497,6 +1570,7 @@ struct intel_pps {
         */
        bool pps_reset;
        struct edp_power_seq pps_delays;
+       struct edp_power_seq bios_pps_delays;
 };
 
 struct intel_psr {
@@ -1728,13 +1802,14 @@ static inline enum dpio_channel
 vlv_dig_port_to_channel(struct intel_digital_port *dig_port)
 {
        switch (dig_port->base.port) {
+       default:
+               MISSING_CASE(dig_port->base.port);
+               fallthrough;
        case PORT_B:
        case PORT_D:
                return DPIO_CH0;
        case PORT_C:
                return DPIO_CH1;
-       default:
-               BUG();
        }
 }
 
@@ -1742,13 +1817,14 @@ static inline enum dpio_phy
 vlv_dig_port_to_phy(struct intel_digital_port *dig_port)
 {
        switch (dig_port->base.port) {
+       default:
+               MISSING_CASE(dig_port->base.port);
+               fallthrough;
        case PORT_B:
        case PORT_C:
                return DPIO_PHY0;
        case PORT_D:
                return DPIO_PHY1;
-       default:
-               BUG();
        }
 }
 
@@ -1756,13 +1832,14 @@ static inline enum dpio_channel
 vlv_pipe_to_channel(enum pipe pipe)
 {
        switch (pipe) {
+       default:
+               MISSING_CASE(pipe);
+               fallthrough;
        case PIPE_A:
        case PIPE_C:
                return DPIO_CH0;
        case PIPE_B:
                return DPIO_CH1;
-       default:
-               BUG();
        }
 }