drm/amd/powerplay: add atomctrl function to calculate CZ sclk dividers

[linux-2.6-block.git] / drivers / gpu / drm / amd / powerplay / hwmgr / ppatomctrl.c

diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c b/drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c
index 8b47ea0c8d3e21d84b2ee14314b45e7c855b93fd..ea87c9088b32e1c5f16fec1b387dc696cbbd37f4 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c
@@ -313,6 +313,28 @@ int atomctrl_get_memory_pll_dividers_vi(struct pp_hwmgr *hwmgr,
        return result;
 }
 
+int atomctrl_get_engine_pll_dividers_kong(struct pp_hwmgr *hwmgr,
+                                         uint32_t clock_value,
+                                         pp_atomctrl_clock_dividers_kong *dividers)
+{
+       COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS_V4 pll_parameters;
+       int result;
+
+       pll_parameters.ulClock = clock_value;
+
+       result = cgs_atom_exec_cmd_table
+               (hwmgr->device,
+                GetIndexIntoMasterTable(COMMAND, ComputeMemoryEnginePLL),
+                &pll_parameters);
+
+       if (0 == result) {
+               dividers->pll_post_divider = pll_parameters.ucPostDiv;
+               dividers->real_clock = pll_parameters.ulClock;
+       }
+
+       return result;
+}
+
 int atomctrl_get_engine_pll_dividers_vi(
                struct pp_hwmgr *hwmgr,
                uint32_t clock_value,