Merge tag 'amd-drm-next-6.5-2023-06-09' of https://gitlab.freedesktop.org/agd5f/linux...
[linux-2.6-block.git] / drivers / gpu / drm / amd / display / dc / dcn20 / dcn20_hwseq.c
index 5403e9399a465c948c81e40f352dcb437751660d..5934b1d70e48552e25d1059010f3ea9a195fef6b 100644 (file)
@@ -313,6 +313,10 @@ void dcn20_init_blank(
        }
        opp = dc->res_pool->opps[opp_id_src0];
 
+       /* don't override the blank pattern if already enabled with the correct one. */
+       if (opp->funcs->dpg_is_blanked && opp->funcs->dpg_is_blanked(opp))
+               return;
+
        if (num_opps == 2) {
                otg_active_width = otg_active_width / 2;
 
@@ -1357,6 +1361,7 @@ static void dcn20_detect_pipe_changes(struct pipe_ctx *old_pipe, struct pipe_ctx
                new_pipe->update_flags.bits.dppclk = 1;
                new_pipe->update_flags.bits.hubp_interdependent = 1;
                new_pipe->update_flags.bits.hubp_rq_dlg_ttu = 1;
+               new_pipe->update_flags.bits.unbounded_req = 1;
                new_pipe->update_flags.bits.gamut_remap = 1;
                new_pipe->update_flags.bits.scaler = 1;
                new_pipe->update_flags.bits.viewport = 1;
@@ -1500,6 +1505,9 @@ static void dcn20_detect_pipe_changes(struct pipe_ctx *old_pipe, struct pipe_ctx
                                memcmp(&old_pipe->rq_regs, &new_pipe->rq_regs, sizeof(old_pipe->rq_regs)))
                        new_pipe->update_flags.bits.hubp_rq_dlg_ttu = 1;
        }
+
+       if (old_pipe->unbounded_req != new_pipe->unbounded_req)
+               new_pipe->update_flags.bits.unbounded_req = 1;
 }
 
 static void dcn20_update_dchubp_dpp(
@@ -1533,10 +1541,11 @@ static void dcn20_update_dchubp_dpp(
                        &pipe_ctx->ttu_regs,
                        &pipe_ctx->rq_regs,
                        &pipe_ctx->pipe_dlg_param);
-
-               if (hubp->funcs->set_unbounded_requesting)
-                       hubp->funcs->set_unbounded_requesting(hubp, pipe_ctx->unbounded_req);
        }
+
+       if (pipe_ctx->update_flags.bits.unbounded_req && hubp->funcs->set_unbounded_requesting)
+               hubp->funcs->set_unbounded_requesting(hubp, pipe_ctx->unbounded_req);
+
        if (pipe_ctx->update_flags.bits.hubp_interdependent)
                hubp->funcs->hubp_setup_interdependent(
                        hubp,
@@ -1732,6 +1741,17 @@ static void dcn20_program_pipe(
 
                if (hws->funcs.setup_vupdate_interrupt)
                        hws->funcs.setup_vupdate_interrupt(dc, pipe_ctx);
+
+               if (hws->funcs.calculate_dccg_k1_k2_values && dc->res_pool->dccg->funcs->set_pixel_rate_div) {
+                       unsigned int k1_div, k2_div;
+
+                       hws->funcs.calculate_dccg_k1_k2_values(pipe_ctx, &k1_div, &k2_div);
+
+                       dc->res_pool->dccg->funcs->set_pixel_rate_div(
+                               dc->res_pool->dccg,
+                               pipe_ctx->stream_res.tg->inst,
+                               k1_div, k2_div);
+               }
        }
 
        if (pipe_ctx->update_flags.bits.odm)
@@ -2113,11 +2133,20 @@ void dcn20_optimize_bandwidth(
        if (hubbub->funcs->program_compbuf_size)
                hubbub->funcs->program_compbuf_size(hubbub, context->bw_ctx.bw.dcn.compbuf_size_kb, true);
 
+       if (context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching) {
+               dc_dmub_srv_p_state_delegate(dc,
+                       true, context);
+               context->bw_ctx.bw.dcn.clk.p_state_change_support = true;
+               dc->clk_mgr->clks.fw_based_mclk_switching = true;
+       } else {
+               dc->clk_mgr->clks.fw_based_mclk_switching = false;
+       }
+
        dc->clk_mgr->funcs->update_clocks(
                        dc->clk_mgr,
                        context,
                        true);
-       if (dc_extended_blank_supported(dc) && context->bw_ctx.bw.dcn.clk.zstate_support == DCN_ZSTATE_SUPPORT_ALLOW) {
+       if (context->bw_ctx.bw.dcn.clk.zstate_support == DCN_ZSTATE_SUPPORT_ALLOW) {
                for (i = 0; i < dc->res_pool->pipe_count; ++i) {
                        struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i];
 
@@ -2125,7 +2154,7 @@ void dcn20_optimize_bandwidth(
                                && pipe_ctx->stream->adjust.v_total_min == pipe_ctx->stream->adjust.v_total_max
                                && pipe_ctx->stream->adjust.v_total_max > pipe_ctx->stream->timing.v_total)
                                        pipe_ctx->plane_res.hubp->funcs->program_extended_blank(pipe_ctx->plane_res.hubp,
-                                               pipe_ctx->dlg_regs.optimized_min_dst_y_next_start);
+                                               pipe_ctx->dlg_regs.min_dst_y_next_start);
                }
        }
 }
@@ -2462,36 +2491,31 @@ static void dcn20_reset_back_end_for_pipe(
                return;
        }
 
-       if (!IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) {
-               /* DPMS may already disable or */
-               /* dpms_off status is incorrect due to fastboot
-                * feature. When system resume from S4 with second
-                * screen only, the dpms_off would be true but
-                * VBIOS lit up eDP, so check link status too.
-                */
-               if (!pipe_ctx->stream->dpms_off || link->link_status.link_active)
-                       dc->link_srv->set_dpms_off(pipe_ctx);
-               else if (pipe_ctx->stream_res.audio)
-                       dc->hwss.disable_audio_stream(pipe_ctx);
-
-               /* free acquired resources */
-               if (pipe_ctx->stream_res.audio) {
-                       /*disable az_endpoint*/
-                       pipe_ctx->stream_res.audio->funcs->az_disable(pipe_ctx->stream_res.audio);
-
-                       /*free audio*/
-                       if (dc->caps.dynamic_audio == true) {
-                               /*we have to dynamic arbitrate the audio endpoints*/
-                               /*we free the resource, need reset is_audio_acquired*/
-                               update_audio_usage(&dc->current_state->res_ctx, dc->res_pool,
-                                               pipe_ctx->stream_res.audio, false);
-                               pipe_ctx->stream_res.audio = NULL;
-                       }
+       /* DPMS may already disable or */
+       /* dpms_off status is incorrect due to fastboot
+        * feature. When system resume from S4 with second
+        * screen only, the dpms_off would be true but
+        * VBIOS lit up eDP, so check link status too.
+        */
+       if (!pipe_ctx->stream->dpms_off || link->link_status.link_active)
+               dc->link_srv->set_dpms_off(pipe_ctx);
+       else if (pipe_ctx->stream_res.audio)
+               dc->hwss.disable_audio_stream(pipe_ctx);
+
+       /* free acquired resources */
+       if (pipe_ctx->stream_res.audio) {
+               /*disable az_endpoint*/
+               pipe_ctx->stream_res.audio->funcs->az_disable(pipe_ctx->stream_res.audio);
+
+               /*free audio*/
+               if (dc->caps.dynamic_audio == true) {
+                       /*we have to dynamic arbitrate the audio endpoints*/
+                       /*we free the resource, need reset is_audio_acquired*/
+                       update_audio_usage(&dc->current_state->res_ctx, dc->res_pool,
+                                       pipe_ctx->stream_res.audio, false);
+                       pipe_ctx->stream_res.audio = NULL;
                }
        }
-       else if (pipe_ctx->stream_res.dsc) {
-               dc->link_srv->set_dsc_enable(pipe_ctx, false);
-       }
 
        /* by upper caller loop, parent pipe: pipe0, will be reset last.
         * back end share by all pipes and will be disable only when disable
@@ -2567,28 +2591,6 @@ void dcn20_reset_hw_ctx_wrap(
        }
 }
 
-void dcn20_update_visual_confirm_color(struct dc *dc, struct pipe_ctx *pipe_ctx, struct tg_color *color, int mpcc_id)
-{
-       struct mpc *mpc = dc->res_pool->mpc;
-
-       // input to MPCC is always RGB, by default leave black_color at 0
-       if (dc->debug.visual_confirm == VISUAL_CONFIRM_HDR)
-               get_hdr_visual_confirm_color(pipe_ctx, color);
-       else if (dc->debug.visual_confirm == VISUAL_CONFIRM_SURFACE)
-               get_surface_visual_confirm_color(pipe_ctx, color);
-       else if (dc->debug.visual_confirm == VISUAL_CONFIRM_MPCTREE)
-               get_mpctree_visual_confirm_color(pipe_ctx, color);
-       else if (dc->debug.visual_confirm == VISUAL_CONFIRM_SWIZZLE)
-               get_surface_tile_visual_confirm_color(pipe_ctx, color);
-       else if (dc->debug.visual_confirm == VISUAL_CONFIRM_SUBVP)
-               get_subvp_visual_confirm_color(dc, pipe_ctx, color);
-
-       if (mpc->funcs->set_bg_color) {
-               memcpy(&pipe_ctx->plane_state->visual_confirm_color, color, sizeof(struct tg_color));
-               mpc->funcs->set_bg_color(mpc, color, mpcc_id);
-       }
-}
-
 void dcn20_update_mpcc(struct dc *dc, struct pipe_ctx *pipe_ctx)
 {
        struct hubp *hubp = pipe_ctx->plane_res.hubp;
@@ -2644,7 +2646,7 @@ void dcn20_update_mpcc(struct dc *dc, struct pipe_ctx *pipe_ctx)
        if (!pipe_ctx->plane_state->update_flags.bits.full_update &&
                !pipe_ctx->update_flags.bits.mpcc) {
                mpc->funcs->update_blending(mpc, &blnd_cfg, mpcc_id);
-               dc->hwss.update_visual_confirm_color(dc, pipe_ctx, &blnd_cfg.black_color, mpcc_id);
+               dc->hwss.update_visual_confirm_color(dc, pipe_ctx, mpcc_id);
                return;
        }
 
@@ -2666,7 +2668,7 @@ void dcn20_update_mpcc(struct dc *dc, struct pipe_ctx *pipe_ctx)
                        NULL,
                        hubp->inst,
                        mpcc_id);
-       dc->hwss.update_visual_confirm_color(dc, pipe_ctx, &blnd_cfg.black_color, mpcc_id);
+       dc->hwss.update_visual_confirm_color(dc, pipe_ctx, mpcc_id);
 
        ASSERT(new_mpcc != NULL);
        hubp->opp_id = pipe_ctx->stream_res.opp->inst;