drm/amdgpu: add read/write function for GC CAC programming

[linux-2.6-block.git] / drivers / gpu / drm / amd / amdgpu / vi.c

diff --git a/drivers/gpu/drm/amd/amdgpu/vi.c b/drivers/gpu/drm/amd/amdgpu/vi.c
index 66effd2173a5f5266086cf3d12b3f80423d0fe68..cda7def9dc2c1be7c84d1e4df2c0688065455ff2 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/vi.c
+++ b/drivers/gpu/drm/amd/amdgpu/vi.c
@@ -203,6 +203,29 @@ static void vi_didt_wreg(struct amdgpu_device *adev, u32 reg, u32 v)
        spin_unlock_irqrestore(&adev->didt_idx_lock, flags);
 }
 
+static u32 vi_gc_cac_rreg(struct amdgpu_device *adev, u32 reg)
+{
+       unsigned long flags;
+       u32 r;
+
+       spin_lock_irqsave(&adev->gc_cac_idx_lock, flags);
+       WREG32(mmGC_CAC_IND_INDEX, (reg));
+       r = RREG32(mmGC_CAC_IND_DATA);
+       spin_unlock_irqrestore(&adev->gc_cac_idx_lock, flags);
+       return r;
+}
+
+static void vi_gc_cac_wreg(struct amdgpu_device *adev, u32 reg, u32 v)
+{
+       unsigned long flags;
+
+       spin_lock_irqsave(&adev->gc_cac_idx_lock, flags);
+       WREG32(mmGC_CAC_IND_INDEX, (reg));
+       WREG32(mmGC_CAC_IND_DATA, (v));
+       spin_unlock_irqrestore(&adev->gc_cac_idx_lock, flags);
+}
+
+
 static const u32 tonga_mgcg_cgcg_init[] =
 {
        mmCGTT_DRM_CLK_CTRL0, 0xffffffff, 0x00600100,
@@ -1158,6 +1181,8 @@ static int vi_common_early_init(void *handle)
        adev->uvd_ctx_wreg = &vi_uvd_ctx_wreg;
        adev->didt_rreg = &vi_didt_rreg;
        adev->didt_wreg = &vi_didt_wreg;
+       adev->gc_cac_rreg = &vi_gc_cac_rreg;
+       adev->gc_cac_wreg = &vi_gc_cac_wreg;
 
        adev->asic_funcs = &vi_asic_funcs;