drm/amdgpu: Move to common indirect reg access helper

[linux-2.6-block.git] / drivers / gpu / drm / amd / amdgpu / soc15.c

diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c b/drivers/gpu/drm/amd/amdgpu/soc15.c
index 7cd17dda32ceb3026425c8db3e293f19b7613ec5..70343f9d25b983c504925b4a68e5d9ac20b75ef0 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/soc15.c
+++ b/drivers/gpu/drm/amd/amdgpu/soc15.c
@@ -191,47 +191,6 @@ static int soc15_query_video_codecs(struct amdgpu_device *adev, bool encode,
        }
 }
 
-/*
- * Indirect registers accessor
- */
-static u32 soc15_pcie_rreg(struct amdgpu_device *adev, u32 reg)
-{
-       unsigned long address, data;
-       address = adev->nbio.funcs->get_pcie_index_offset(adev);
-       data = adev->nbio.funcs->get_pcie_data_offset(adev);
-
-       return amdgpu_device_indirect_rreg(adev, address, data, reg);
-}
-
-static void soc15_pcie_wreg(struct amdgpu_device *adev, u32 reg, u32 v)
-{
-       unsigned long address, data;
-
-       address = adev->nbio.funcs->get_pcie_index_offset(adev);
-       data = adev->nbio.funcs->get_pcie_data_offset(adev);
-
-       amdgpu_device_indirect_wreg(adev, address, data, reg, v);
-}
-
-static u64 soc15_pcie_rreg64(struct amdgpu_device *adev, u32 reg)
-{
-       unsigned long address, data;
-       address = adev->nbio.funcs->get_pcie_index_offset(adev);
-       data = adev->nbio.funcs->get_pcie_data_offset(adev);
-
-       return amdgpu_device_indirect_rreg64(adev, address, data, reg);
-}
-
-static void soc15_pcie_wreg64(struct amdgpu_device *adev, u32 reg, u64 v)
-{
-       unsigned long address, data;
-
-       address = adev->nbio.funcs->get_pcie_index_offset(adev);
-       data = adev->nbio.funcs->get_pcie_data_offset(adev);
-
-       amdgpu_device_indirect_wreg64(adev, address, data, reg, v);
-}
-
 static u32 soc15_uvd_ctx_rreg(struct amdgpu_device *adev, u32 reg)
 {
        unsigned long flags, address, data;
@@ -439,8 +398,9 @@ static int soc15_read_register(struct amdgpu_device *adev, u32 se_num,
        *value = 0;
        for (i = 0; i < ARRAY_SIZE(soc15_allowed_read_registers); i++) {
                en = &soc15_allowed_read_registers[i];
-               if (adev->reg_offset[en->hwip][en->inst] &&
-                       reg_offset != (adev->reg_offset[en->hwip][en->inst][en->seg]
+               if (!adev->reg_offset[en->hwip][en->inst])
+                       continue;
+               else if (reg_offset != (adev->reg_offset[en->hwip][en->inst][en->seg]
                                        + en->reg_offset))
                        continue;
 
@@ -935,10 +895,10 @@ static int soc15_common_early_init(void *handle)
        }
        adev->smc_rreg = NULL;
        adev->smc_wreg = NULL;
-       adev->pcie_rreg = &soc15_pcie_rreg;
-       adev->pcie_wreg = &soc15_pcie_wreg;
-       adev->pcie_rreg64 = &soc15_pcie_rreg64;
-       adev->pcie_wreg64 = &soc15_pcie_wreg64;
+       adev->pcie_rreg = &amdgpu_device_indirect_rreg;
+       adev->pcie_wreg = &amdgpu_device_indirect_wreg;
+       adev->pcie_rreg64 = &amdgpu_device_indirect_rreg64;
+       adev->pcie_wreg64 = &amdgpu_device_indirect_wreg64;
        adev->uvd_ctx_rreg = &soc15_uvd_ctx_rreg;
        adev->uvd_ctx_wreg = &soc15_uvd_ctx_wreg;
        adev->didt_rreg = &soc15_didt_rreg;