drm/amdgpu: Fix the ring buffer size for queue VM flush
[linux-block.git] / drivers / gpu / drm / amd / amdgpu / gfx_v11_0.c
index f7325b02a191f726196d4ad0ac6fa3d090ab9977..f00e05aba46a4e40b97ef0cbfe093a3b17ef350f 100644 (file)
@@ -6192,7 +6192,7 @@ static const struct amdgpu_ring_funcs gfx_v11_0_ring_funcs_gfx = {
                7 + /* PIPELINE_SYNC */
                SOC15_FLUSH_GPU_TLB_NUM_WREG * 5 +
                SOC15_FLUSH_GPU_TLB_NUM_REG_WAIT * 7 +
-               2 + /* VM_FLUSH */
+               4 + /* VM_FLUSH */
                8 + /* FENCE for VM_FLUSH */
                20 + /* GDS switch */
                5 + /* COND_EXEC */
@@ -6278,7 +6278,6 @@ static const struct amdgpu_ring_funcs gfx_v11_0_ring_funcs_kiq = {
                7 + /* gfx_v11_0_ring_emit_pipeline_sync */
                SOC15_FLUSH_GPU_TLB_NUM_WREG * 5 +
                SOC15_FLUSH_GPU_TLB_NUM_REG_WAIT * 7 +
-               2 + /* gfx_v11_0_ring_emit_vm_flush */
                8 + 8 + 8, /* gfx_v11_0_ring_emit_fence_kiq x3 for user fence, vm fence */
        .emit_ib_size = 7, /* gfx_v11_0_ring_emit_ib_compute */
        .emit_ib = gfx_v11_0_ring_emit_ib_compute,