drm/amdgpu: Get DRM dev from adev by inline-f

[linux-2.6-block.git] / drivers / gpu / drm / amd / amdgpu / dce_v6_0.c

diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
index e234d6fb49ab502fb09ba550233de4ddd0d00601..3a44753a80d108e5a2f468586907ae75b6d763b0 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
@@ -279,7 +279,7 @@ static void dce_v6_0_hpd_set_polarity(struct amdgpu_device *adev,
  */
 static void dce_v6_0_hpd_init(struct amdgpu_device *adev)
 {
-       struct drm_device *dev = adev->ddev;
+       struct drm_device *dev = adev_to_drm(adev);
        struct drm_connector *connector;
        struct drm_connector_list_iter iter;
        u32 tmp;
@@ -324,7 +324,7 @@ static void dce_v6_0_hpd_init(struct amdgpu_device *adev)
  */
 static void dce_v6_0_hpd_fini(struct amdgpu_device *adev)
 {
-       struct drm_device *dev = adev->ddev;
+       struct drm_device *dev = adev_to_drm(adev);
        struct drm_connector *connector;
        struct drm_connector_list_iter iter;
        u32 tmp;
@@ -2591,7 +2591,7 @@ static int dce_v6_0_crtc_init(struct amdgpu_device *adev, int index)
        if (amdgpu_crtc == NULL)
                return -ENOMEM;
 
-       drm_crtc_init(adev->ddev, &amdgpu_crtc->base, &dce_v6_0_crtc_funcs);
+       drm_crtc_init(adev_to_drm(adev), &amdgpu_crtc->base, &dce_v6_0_crtc_funcs);
 
        drm_mode_crtc_set_gamma_size(&amdgpu_crtc->base, 256);
        amdgpu_crtc->crtc_id = index;
@@ -2599,8 +2599,8 @@ static int dce_v6_0_crtc_init(struct amdgpu_device *adev, int index)
 
        amdgpu_crtc->max_cursor_width = CURSOR_WIDTH;
        amdgpu_crtc->max_cursor_height = CURSOR_HEIGHT;
-       adev->ddev->mode_config.cursor_width = amdgpu_crtc->max_cursor_width;
-       adev->ddev->mode_config.cursor_height = amdgpu_crtc->max_cursor_height;
+       adev_to_drm(adev)->mode_config.cursor_width = amdgpu_crtc->max_cursor_width;
+       adev_to_drm(adev)->mode_config.cursor_height = amdgpu_crtc->max_cursor_height;
 
        amdgpu_crtc->crtc_offset = crtc_offsets[amdgpu_crtc->crtc_id];
 
@@ -2669,20 +2669,20 @@ static int dce_v6_0_sw_init(void *handle)
 
        adev->mode_info.mode_config_initialized = true;
 
-       adev->ddev->mode_config.funcs = &amdgpu_mode_funcs;
-       adev->ddev->mode_config.async_page_flip = true;
-       adev->ddev->mode_config.max_width = 16384;
-       adev->ddev->mode_config.max_height = 16384;
-       adev->ddev->mode_config.preferred_depth = 24;
-       adev->ddev->mode_config.prefer_shadow = 1;
-       adev->ddev->mode_config.fb_base = adev->gmc.aper_base;
+       adev_to_drm(adev)->mode_config.funcs = &amdgpu_mode_funcs;
+       adev_to_drm(adev)->mode_config.async_page_flip = true;
+       adev_to_drm(adev)->mode_config.max_width = 16384;
+       adev_to_drm(adev)->mode_config.max_height = 16384;
+       adev_to_drm(adev)->mode_config.preferred_depth = 24;
+       adev_to_drm(adev)->mode_config.prefer_shadow = 1;
+       adev_to_drm(adev)->mode_config.fb_base = adev->gmc.aper_base;
 
        r = amdgpu_display_modeset_create_props(adev);
        if (r)
                return r;
 
-       adev->ddev->mode_config.max_width = 16384;
-       adev->ddev->mode_config.max_height = 16384;
+       adev_to_drm(adev)->mode_config.max_width = 16384;
+       adev_to_drm(adev)->mode_config.max_height = 16384;
 
        /* allocate crtcs */
        for (i = 0; i < adev->mode_info.num_crtc; i++) {
@@ -2693,7 +2693,7 @@ static int dce_v6_0_sw_init(void *handle)
 
        ret = amdgpu_atombios_get_connector_info_from_object_table(adev);
        if (ret)
-               amdgpu_display_print_display_setup(adev->ddev);
+               amdgpu_display_print_display_setup(adev_to_drm(adev));
        else
                return -EINVAL;
 
@@ -2706,7 +2706,7 @@ static int dce_v6_0_sw_init(void *handle)
        if (r)
                return r;
 
-       drm_kms_helper_poll_init(adev->ddev);
+       drm_kms_helper_poll_init(adev_to_drm(adev));
 
        return r;
 }
@@ -2717,12 +2717,12 @@ static int dce_v6_0_sw_fini(void *handle)
 
        kfree(adev->mode_info.bios_hardcoded_edid);
 
-       drm_kms_helper_poll_fini(adev->ddev);
+       drm_kms_helper_poll_fini(adev_to_drm(adev));
 
        dce_v6_0_audio_fini(adev);
        dce_v6_0_afmt_fini(adev);
 
-       drm_mode_config_cleanup(adev->ddev);
+       drm_mode_config_cleanup(adev_to_drm(adev));
        adev->mode_info.mode_config_initialized = false;
 
        return 0;
@@ -2967,7 +2967,7 @@ static int dce_v6_0_crtc_irq(struct amdgpu_device *adev,
                        DRM_DEBUG("IH: IH event w/o asserted irq bit?\n");
 
                if (amdgpu_irq_enabled(adev, source, irq_type)) {
-                       drm_handle_vblank(adev->ddev, crtc);
+                       drm_handle_vblank(adev_to_drm(adev), crtc);
                }
                DRM_DEBUG("IH: D%d vblank\n", crtc + 1);
                break;
@@ -3036,14 +3036,14 @@ static int dce_v6_0_pageflip_irq(struct amdgpu_device *adev,
        if (amdgpu_crtc == NULL)
                return 0;
 
-       spin_lock_irqsave(&adev->ddev->event_lock, flags);
+       spin_lock_irqsave(&adev_to_drm(adev)->event_lock, flags);
        works = amdgpu_crtc->pflip_works;
        if (amdgpu_crtc->pflip_status != AMDGPU_FLIP_SUBMITTED){
                DRM_DEBUG_DRIVER("amdgpu_crtc->pflip_status = %d != "
                                                "AMDGPU_FLIP_SUBMITTED(%d)\n",
                                                amdgpu_crtc->pflip_status,
                                                AMDGPU_FLIP_SUBMITTED);
-               spin_unlock_irqrestore(&adev->ddev->event_lock, flags);
+               spin_unlock_irqrestore(&adev_to_drm(adev)->event_lock, flags);
                return 0;
        }
 
@@ -3055,7 +3055,7 @@ static int dce_v6_0_pageflip_irq(struct amdgpu_device *adev,
        if (works->event)
                drm_crtc_send_vblank_event(&amdgpu_crtc->base, works->event);
 
-       spin_unlock_irqrestore(&adev->ddev->event_lock, flags);
+       spin_unlock_irqrestore(&adev_to_drm(adev)->event_lock, flags);
 
        drm_crtc_vblank_put(&amdgpu_crtc->base);
        schedule_work(&works->unpin_work);
@@ -3297,7 +3297,7 @@ static void dce_v6_0_encoder_add(struct amdgpu_device *adev,
                                 uint32_t supported_device,
                                 u16 caps)
 {
-       struct drm_device *dev = adev->ddev;
+       struct drm_device *dev = adev_to_drm(adev);
        struct drm_encoder *encoder;
        struct amdgpu_encoder *amdgpu_encoder;