drm/amdgpu: alloc vm inv engines for every vmhub
[linux-block.git] / drivers / gpu / drm / amd / amdgpu / amdgpu_gmc.c
index 0a4e5fcfec6bb99f43817cafa862a7172fc1a34c..b8825a0670a4165596e645df1800ee00c1509f7a 100644 (file)
@@ -534,22 +534,21 @@ void amdgpu_gmc_ras_fini(struct amdgpu_device *adev)
         *                    subject to change when ring number changes
         * Engine 17: Gart flushes
         */
-#define GFXHUB_FREE_VM_INV_ENGS_BITMAP         0x1FFF3
-#define MMHUB_FREE_VM_INV_ENGS_BITMAP          0x1FFF3
+#define AMDGPU_VMHUB_INV_ENG_BITMAP            0x1FFF3
 
 int amdgpu_gmc_allocate_vm_inv_eng(struct amdgpu_device *adev)
 {
        struct amdgpu_ring *ring;
-       unsigned vm_inv_engs[AMDGPU_MAX_VMHUBS] =
-               {GFXHUB_FREE_VM_INV_ENGS_BITMAP, MMHUB_FREE_VM_INV_ENGS_BITMAP,
-               GFXHUB_FREE_VM_INV_ENGS_BITMAP};
+       unsigned vm_inv_engs[AMDGPU_MAX_VMHUBS] = {0};
        unsigned i;
        unsigned vmhub, inv_eng;
 
-       if (adev->enable_mes) {
+       /* init the vm inv eng for all vmhubs */
+       for_each_set_bit(i, adev->vmhubs_mask, AMDGPU_MAX_VMHUBS) {
+               vm_inv_engs[i] = AMDGPU_VMHUB_INV_ENG_BITMAP;
                /* reserve engine 5 for firmware */
-               for (vmhub = 0; vmhub < AMDGPU_MAX_VMHUBS; vmhub++)
-                       vm_inv_engs[vmhub] &= ~(1 << 5);
+               if (adev->enable_mes)
+                       vm_inv_engs[i] &= ~(1 << 5);
        }
 
        for (i = 0; i < adev->num_rings; ++i) {