Merge tag 'gpio-updates-for-v6.10-rc1' of git://git.kernel.org/pub/scm/linux/kernel...

[linux-2.6-block.git] / drivers / gpio / gpio-sch.c

diff --git a/drivers/gpio/gpio-sch.c b/drivers/gpio/gpio-sch.c
index e48392074e4b8667a1c986989c55ef8cd426b38e..ff0341b1222f7ec2ea0df56b004222946d2418c4 100644 (file)
--- a/drivers/gpio/gpio-sch.c
+++ b/drivers/gpio/gpio-sch.c
@@ -38,8 +38,8 @@
 
 struct sch_gpio {
        struct gpio_chip chip;
+       void __iomem *regs;
        spinlock_t lock;
-       unsigned short iobase;
        unsigned short resume_base;
 
        /* GPE handling */
@@ -75,7 +75,7 @@ static int sch_gpio_reg_get(struct sch_gpio *sch, unsigned int gpio, unsigned in
        offset = sch_gpio_offset(sch, gpio, reg);
        bit = sch_gpio_bit(sch, gpio);
 
-       reg_val = !!(inb(sch->iobase + offset) & BIT(bit));
+       reg_val = !!(ioread8(sch->regs + offset) & BIT(bit));
 
        return reg_val;
 }
@@ -89,12 +89,14 @@ static void sch_gpio_reg_set(struct sch_gpio *sch, unsigned int gpio, unsigned i
        offset = sch_gpio_offset(sch, gpio, reg);
        bit = sch_gpio_bit(sch, gpio);
 
-       reg_val = inb(sch->iobase + offset);
+       reg_val = ioread8(sch->regs + offset);
 
        if (val)
-               outb(reg_val | BIT(bit), sch->iobase + offset);
+               reg_val |= BIT(bit);
        else
-               outb((reg_val & ~BIT(bit)), sch->iobase + offset);
+               reg_val &= ~BIT(bit);
+
+       iowrite8(reg_val, sch->regs + offset);
 }
 
 static int sch_gpio_direction_in(struct gpio_chip *gc, unsigned int gpio_num)
@@ -267,8 +269,8 @@ static u32 sch_gpio_gpe_handler(acpi_handle gpe_device, u32 gpe, void *context)
 
        spin_lock_irqsave(&sch->lock, flags);
 
-       core_status = inl(sch->iobase + CORE_BANK_OFFSET + GTS);
-       resume_status = inl(sch->iobase + RESUME_BANK_OFFSET + GTS);
+       core_status = ioread32(sch->regs + CORE_BANK_OFFSET + GTS);
+       resume_status = ioread32(sch->regs + RESUME_BANK_OFFSET + GTS);
 
        spin_unlock_irqrestore(&sch->lock, flags);
 
@@ -319,12 +321,14 @@ static int sch_gpio_install_gpe_handler(struct sch_gpio *sch)
 
 static int sch_gpio_probe(struct platform_device *pdev)
 {
+       struct device *dev = &pdev->dev;
        struct gpio_irq_chip *girq;
        struct sch_gpio *sch;
        struct resource *res;
+       void __iomem *regs;
        int ret;
 
-       sch = devm_kzalloc(&pdev->dev, sizeof(*sch), GFP_KERNEL);
+       sch = devm_kzalloc(dev, sizeof(*sch), GFP_KERNEL);
        if (!sch)
                return -ENOMEM;
 
@@ -332,15 +336,16 @@ static int sch_gpio_probe(struct platform_device *pdev)
        if (!res)
                return -EBUSY;
 
-       if (!devm_request_region(&pdev->dev, res->start, resource_size(res),
-                                pdev->name))
+       regs = devm_ioport_map(dev, res->start, resource_size(res));
+       if (!regs)
                return -EBUSY;
 
+       sch->regs = regs;
+
        spin_lock_init(&sch->lock);
-       sch->iobase = res->start;
        sch->chip = sch_gpio_chip;
-       sch->chip.label = dev_name(&pdev->dev);
-       sch->chip.parent = &pdev->dev;
+       sch->chip.label = dev_name(dev);
+       sch->chip.parent = dev;
 
        switch (pdev->id) {
        case PCI_DEVICE_ID_INTEL_SCH_LPC:
@@ -394,9 +399,9 @@ static int sch_gpio_probe(struct platform_device *pdev)
 
        ret = sch_gpio_install_gpe_handler(sch);
        if (ret)
-               dev_warn(&pdev->dev, "Can't setup GPE, no IRQ support\n");
+               dev_warn(dev, "Can't setup GPE, no IRQ support\n");
 
-       return devm_gpiochip_add_data(&pdev->dev, &sch->chip, sch);
+       return devm_gpiochip_add_data(dev, &sch->chip, sch);
 }
 
 static struct platform_driver sch_gpio_driver = {