x86/MCE/AMD: Read MCx_MISC block addresses on any CPU

[linux-2.6-block.git] / arch / x86 / kernel / cpu / mcheck / mce_amd.c

diff --git a/arch/x86/kernel/cpu/mcheck/mce_amd.c b/arch/x86/kernel/cpu/mcheck/mce_amd.c
index c8e038800591674021c84bc66cae2fe4f02fcfc9..f591b01930db4abf6740b41d588644e0facbd61e 100644 (file)
--- a/arch/x86/kernel/cpu/mcheck/mce_amd.c
+++ b/arch/x86/kernel/cpu/mcheck/mce_amd.c
@@ -436,8 +436,7 @@ static void deferred_error_interrupt_enable(struct cpuinfo_x86 *c)
        wrmsr(MSR_CU_DEF_ERR, low, high);
 }
 
-static u32 smca_get_block_address(unsigned int cpu, unsigned int bank,
-                                 unsigned int block)
+static u32 smca_get_block_address(unsigned int bank, unsigned int block)
 {
        u32 low, high;
        u32 addr = 0;
@@ -456,13 +455,13 @@ static u32 smca_get_block_address(unsigned int cpu, unsigned int bank,
         * For SMCA enabled processors, BLKPTR field of the first MISC register
         * (MCx_MISC0) indicates presence of additional MISC regs set (MISC1-4).
         */
-       if (rdmsr_safe_on_cpu(cpu, MSR_AMD64_SMCA_MCx_CONFIG(bank), &low, &high))
+       if (rdmsr_safe(MSR_AMD64_SMCA_MCx_CONFIG(bank), &low, &high))
                goto out;
 
        if (!(low & MCI_CONFIG_MCAX))
                goto out;
 
-       if (!rdmsr_safe_on_cpu(cpu, MSR_AMD64_SMCA_MCx_MISC(bank), &low, &high) &&
+       if (!rdmsr_safe(MSR_AMD64_SMCA_MCx_MISC(bank), &low, &high) &&
            (low & MASK_BLKPTR_LO))
                addr = MSR_AMD64_SMCA_MCx_MISCy(bank, block - 1);
 
@@ -471,7 +470,7 @@ out:
        return addr;
 }
 
-static u32 get_block_address(unsigned int cpu, u32 current_addr, u32 low, u32 high,
+static u32 get_block_address(u32 current_addr, u32 low, u32 high,
                             unsigned int bank, unsigned int block)
 {
        u32 addr = 0, offset = 0;
@@ -480,7 +479,7 @@ static u32 get_block_address(unsigned int cpu, u32 current_addr, u32 low, u32 hi
                return addr;
 
        if (mce_flags.smca)
-               return smca_get_block_address(cpu, bank, block);
+               return smca_get_block_address(bank, block);
 
        /* Fall back to method we used for older processors: */
        switch (block) {
@@ -558,7 +557,7 @@ void mce_amd_feature_init(struct cpuinfo_x86 *c)
                        smca_configure(bank, cpu);
 
                for (block = 0; block < NR_BLOCKS; ++block) {
-                       address = get_block_address(cpu, address, low, high, bank, block);
+                       address = get_block_address(address, low, high, bank, block);
                        if (!address)
                                break;
 
@@ -1175,7 +1174,7 @@ static int allocate_threshold_blocks(unsigned int cpu, unsigned int bank,
        if (err)
                goto out_free;
 recurse:
-       address = get_block_address(cpu, address, low, high, bank, ++block);
+       address = get_block_address(address, low, high, bank, ++block);
        if (!address)
                return 0;