Merge tag 'x86-bugs-2022-06-01' of git://git.kernel.org/pub/scm/linux/kernel/git...

[linux-block.git] / arch / x86 / kernel / cpu / common.c

diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index af5d0c188f7b8d41bbeb368c46567a1d85e7c2d5..4730b0a58f24a559f3f4c5decca80589e3c64b4e 100644 (file)
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -60,6 +60,7 @@
 #include <asm/uv/uv.h>
 #include <asm/sigframe.h>
 #include <asm/traps.h>
+#include <asm/sev.h>
 
 #include "cpu.h"
 
@@ -298,13 +299,6 @@ static int __init cachesize_setup(char *str)
 }
 __setup("cachesize=", cachesize_setup);
 
-static int __init x86_sep_setup(char *s)
-{
-       setup_clear_cpu_cap(X86_FEATURE_SEP);
-       return 1;
-}
-__setup("nosep", x86_sep_setup);
-
 /* Standard macro to see if a specific flag is changeable */
 static inline int flag_is_changeable_p(u32 flag)
 {
@@ -376,26 +370,12 @@ static inline void squash_the_stupid_serial_number(struct cpuinfo_x86 *c)
 }
 #endif
 
-static __init int setup_disable_smep(char *arg)
-{
-       setup_clear_cpu_cap(X86_FEATURE_SMEP);
-       return 1;
-}
-__setup("nosmep", setup_disable_smep);
-
 static __always_inline void setup_smep(struct cpuinfo_x86 *c)
 {
        if (cpu_has(c, X86_FEATURE_SMEP))
                cr4_set_bits(X86_CR4_SMEP);
 }
 
-static __init int setup_disable_smap(char *arg)
-{
-       setup_clear_cpu_cap(X86_FEATURE_SMAP);
-       return 1;
-}
-__setup("nosmap", setup_disable_smap);
-
 static __always_inline void setup_smap(struct cpuinfo_x86 *c)
 {
        unsigned long eflags = native_save_fl();
@@ -403,14 +383,8 @@ static __always_inline void setup_smap(struct cpuinfo_x86 *c)
        /* This should have been cleared long ago */
        BUG_ON(eflags & X86_EFLAGS_AC);
 
-       if (cpu_has(c, X86_FEATURE_SMAP)) {
-#ifdef CONFIG_X86_SMAP
+       if (cpu_has(c, X86_FEATURE_SMAP))
                cr4_set_bits(X86_CR4_SMAP);
-#else
-               clear_cpu_cap(c, X86_FEATURE_SMAP);
-               cr4_clear_bits(X86_CR4_SMAP);
-#endif
-       }
 }
 
 static __always_inline void setup_umip(struct cpuinfo_x86 *c)
@@ -1414,8 +1388,8 @@ static void detect_nopl(void)
 static void __init cpu_parse_early_param(void)
 {
        char arg[128];
-       char *argptr = arg;
-       int arglen, res, bit;
+       char *argptr = arg, *opt;
+       int arglen, taint = 0;
 
 #ifdef CONFIG_X86_32
        if (cmdline_find_option_bool(boot_command_line, "no387"))
@@ -1443,21 +1417,61 @@ static void __init cpu_parse_early_param(void)
                return;
 
        pr_info("Clearing CPUID bits:");
-       do {
-               res = get_option(&argptr, &bit);
-               if (res == 0 || res == 3)
-                       break;
 
-               /* If the argument was too long, the last bit may be cut off */
-               if (res == 1 && arglen >= sizeof(arg))
-                       break;
+       while (argptr) {
+               bool found __maybe_unused = false;
+               unsigned int bit;
+
+               opt = strsep(&argptr, ",");
 
-               if (bit >= 0 && bit < NCAPINTS * 32) {
-                       pr_cont(" " X86_CAP_FMT, x86_cap_flag(bit));
+               /*
+                * Handle naked numbers first for feature flags which don't
+                * have names.
+                */
+               if (!kstrtouint(opt, 10, &bit)) {
+                       if (bit < NCAPINTS * 32) {
+
+#ifdef CONFIG_X86_FEATURE_NAMES
+                               /* empty-string, i.e., ""-defined feature flags */
+                               if (!x86_cap_flags[bit])
+                                       pr_cont(" " X86_CAP_FMT_NUM, x86_cap_flag_num(bit));
+                               else
+#endif
+                                       pr_cont(" " X86_CAP_FMT, x86_cap_flag(bit));
+
+                               setup_clear_cpu_cap(bit);
+                               taint++;
+                       }
+                       /*
+                        * The assumption is that there are no feature names with only
+                        * numbers in the name thus go to the next argument.
+                        */
+                       continue;
+               }
+
+#ifdef CONFIG_X86_FEATURE_NAMES
+               for (bit = 0; bit < 32 * NCAPINTS; bit++) {
+                       if (!x86_cap_flag(bit))
+                               continue;
+
+                       if (strcmp(x86_cap_flag(bit), opt))
+                               continue;
+
+                       pr_cont(" %s", opt);
                        setup_clear_cpu_cap(bit);
+                       taint++;
+                       found = true;
+                       break;
                }
-       } while (res == 2);
+
+               if (!found)
+                       pr_cont(" (unknown: %s)", opt);
+#endif
+       }
        pr_cont("\n");
+
+       if (taint)
+               add_taint(TAINT_CPU_OUT_OF_SPEC, LOCKDEP_STILL_OK);
 }
 
 /*
@@ -1905,14 +1919,6 @@ void identify_secondary_cpu(struct cpuinfo_x86 *c)
        tsx_ap_init();
 }
 
-static __init int setup_noclflush(char *arg)
-{
-       setup_clear_cpu_cap(X86_FEATURE_CLFLUSH);
-       setup_clear_cpu_cap(X86_FEATURE_CLFLUSHOPT);
-       return 1;
-}
-__setup("noclflush", setup_noclflush);
-
 void print_cpu_info(struct cpuinfo_x86 *c)
 {
        const char *vendor = NULL;
@@ -2172,6 +2178,9 @@ void cpu_init_exception_handling(void)
 
        load_TR_desc();
 
+       /* GHCB needs to be setup to handle #VC. */
+       setup_ghcb();
+
        /* Finally load the IDT */
        load_current_idt();
 }
@@ -2259,6 +2268,7 @@ void cpu_init_secondary(void)
 }
 #endif
 
+#ifdef CONFIG_MICROCODE_LATE_LOADING
 /*
  * The microcode loader calls this upon late microcode load to recheck features,
  * only when microcode has been updated. Caller holds microcode_mutex and CPU
@@ -2288,6 +2298,7 @@ void microcode_check(void)
        pr_warn("x86/CPU: CPU features have changed after loading microcode, but might not take effect.\n");
        pr_warn("x86/CPU: Please consider either early loading through initrd/built-in or a potential BIOS update.\n");
 }
+#endif
 
 /*
  * Invoked from core CPU hotplug code after hotplug operations