Merge tag 'x86_cpu_for_v6.4_rc1' of git://git.kernel.org/pub/scm/linux/kernel/git...

[linux-block.git] / arch / x86 / kernel / cpu / amd.c

diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
index 1547781e505b46815c59249dc2300bbf5c7fae73..571abf808ea3129131765ef78acbaeb21500e2a6 100644 (file)
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -1009,6 +1009,17 @@ static void init_amd(struct cpuinfo_x86 *c)
                msr_set_bit(MSR_K7_HWCR, MSR_K7_HWCR_IRPERF_EN_BIT);
 
        check_null_seg_clears_base(c);
+
+       /*
+        * Make sure EFER[AIBRSE - Automatic IBRS Enable] is set. The APs are brought up
+        * using the trampoline code and as part of it, MSR_EFER gets prepared there in
+        * order to be replicated onto them. Regardless, set it here again, if not set,
+        * to protect against any future refactoring/code reorganization which might
+        * miss setting this important bit.
+        */
+       if (spectre_v2_in_eibrs_mode(spectre_v2_enabled) &&
+           cpu_has(c, X86_FEATURE_AUTOIBRS))
+               WARN_ON_ONCE(msr_set_bit(MSR_EFER, _EFER_AUTOIBRS));
 }
 
 #ifdef CONFIG_X86_32