x86/mm/tlb: Privatize cpu_tlbstate

[linux-2.6-block.git] / arch / x86 / include / asm / tlbflush.h

diff --git a/arch/x86/include/asm/tlbflush.h b/arch/x86/include/asm/tlbflush.h
index 3c6681def912261a8bcf8c935ce092f3c448de34..fa952eadbc2eb72e6b072d26c1c6b1b8dd1412f6 100644 (file)
--- a/arch/x86/include/asm/tlbflush.h
+++ b/arch/x86/include/asm/tlbflush.h
@@ -89,23 +89,6 @@ struct tlb_state {
        u16 loaded_mm_asid;
        u16 next_asid;
 
-       /*
-        * We can be in one of several states:
-        *
-        *  - Actively using an mm.  Our CPU's bit will be set in
-        *    mm_cpumask(loaded_mm) and is_lazy == false;
-        *
-        *  - Not using a real mm.  loaded_mm == &init_mm.  Our CPU's bit
-        *    will not be set in mm_cpumask(&init_mm) and is_lazy == false.
-        *
-        *  - Lazily using a real mm.  loaded_mm != &init_mm, our bit
-        *    is set in mm_cpumask(loaded_mm), but is_lazy == true.
-        *    We're heuristically guessing that the CR3 load we
-        *    skipped more than makes up for the overhead added by
-        *    lazy mode.
-        */
-       bool is_lazy;
-
        /*
         * If set we changed the page tables in such a way that we
         * needed an invalidation of all contexts (aka. PCIDs / ASIDs).
@@ -151,7 +134,27 @@ struct tlb_state {
         */
        struct tlb_context ctxs[TLB_NR_DYN_ASIDS];
 };
-DECLARE_PER_CPU_SHARED_ALIGNED(struct tlb_state, cpu_tlbstate);
+DECLARE_PER_CPU_ALIGNED(struct tlb_state, cpu_tlbstate);
+
+struct tlb_state_shared {
+       /*
+        * We can be in one of several states:
+        *
+        *  - Actively using an mm.  Our CPU's bit will be set in
+        *    mm_cpumask(loaded_mm) and is_lazy == false;
+        *
+        *  - Not using a real mm.  loaded_mm == &init_mm.  Our CPU's bit
+        *    will not be set in mm_cpumask(&init_mm) and is_lazy == false.
+        *
+        *  - Lazily using a real mm.  loaded_mm != &init_mm, our bit
+        *    is set in mm_cpumask(loaded_mm), but is_lazy == true.
+        *    We're heuristically guessing that the CR3 load we
+        *    skipped more than makes up for the overhead added by
+        *    lazy mode.
+        */
+       bool is_lazy;
+};
+DECLARE_PER_CPU_SHARED_ALIGNED(struct tlb_state_shared, cpu_tlbstate_shared);
 
 bool nmi_uaccess_okay(void);
 #define nmi_uaccess_okay nmi_uaccess_okay