x86, apic: clean up ->cpu_present_to_apicid()

[linux-2.6-block.git] / arch / x86 / include / asm / numaq / apic.h

diff --git a/arch/x86/include/asm/numaq/apic.h b/arch/x86/include/asm/numaq/apic.h
index bf37bc49bd8e4f11fc43acdde6dfee52f9b8c43b..f482b0634476145b6b573020843072fe44207761 100644 (file)
--- a/arch/x86/include/asm/numaq/apic.h
+++ b/arch/x86/include/asm/numaq/apic.h
@@ -7,38 +7,33 @@
 
 #define APIC_DFR_VALUE (APIC_DFR_CLUSTER)
 
-static inline const cpumask_t *target_cpus(void)
+static inline const cpumask_t *numaq_target_cpus(void)
 {
        return &CPU_MASK_ALL;
 }
 
-#define NO_BALANCE_IRQ (1)
-#define esr_disable (1)
-
-#define INT_DELIVERY_MODE dest_LowestPrio
-#define INT_DEST_MODE 0     /* physical delivery on LOCAL quad */
- 
-static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)
+static inline unsigned long
+numaq_check_apicid_used(physid_mask_t bitmap, int apicid)
 {
        return physid_isset(apicid, bitmap);
 }
-static inline unsigned long check_apicid_present(int bit)
+static inline unsigned long numaq_check_apicid_present(int bit)
 {
        return physid_isset(bit, phys_cpu_present_map);
 }
 #define apicid_cluster(apicid) (apicid & 0xF0)
 
-static inline int apic_id_registered(void)
+static inline int numaq_apic_id_registered(void)
 {
        return 1;
 }
 
-static inline void init_apic_ldr(void)
+static inline void numaq_init_apic_ldr(void)
 {
        /* Already done in NUMA-Q firmware */
 }
 
-static inline void setup_apic_routing(void)
+static inline void numaq_setup_apic_routing(void)
 {
        printk("Enabling APIC mode:  %s.  Using %d I/O APICs\n",
                "NUMA-Q", nr_ioapics);
@@ -48,12 +43,12 @@ static inline void setup_apic_routing(void)
  * Skip adding the timer int on secondary nodes, which causes
  * a small but painful rift in the time-space continuum.
  */
-static inline int multi_timer_check(int apic, int irq)
+static inline int numaq_multi_timer_check(int apic, int irq)
 {
        return apic != 0 && irq == 0;
 }
 
-static inline physid_mask_t ioapic_phys_id_map(physid_mask_t phys_map)
+static inline physid_mask_t numaq_ioapic_phys_id_map(physid_mask_t phys_map)
 {
        /* We don't have a good way to do this yet - hack */
        return physids_promote(0xFUL);
@@ -61,7 +56,8 @@ static inline physid_mask_t ioapic_phys_id_map(physid_mask_t phys_map)
 
 /* Mapping from cpu number to logical apicid */
 extern u8 cpu_2_logical_apicid[];
-static inline int cpu_to_logical_apicid(int cpu)
+
+static inline int numaq_cpu_to_logical_apicid(int cpu)
 {
        if (cpu >= nr_cpu_ids)
                return BAD_APICID;
@@ -73,7 +69,7 @@ static inline int cpu_to_logical_apicid(int cpu)
  * cpu to APIC ID relation to properly interact with the intelligent
  * mode of the cluster controller.
  */
-static inline int cpu_present_to_apicid(int mps_cpu)
+static inline int numaq_cpu_present_to_apicid(int mps_cpu)
 {
        if (mps_cpu < 60)
                return ((mps_cpu >> 2) << 4) | (1 << (mps_cpu & 0x3));
@@ -81,14 +77,14 @@ static inline int cpu_present_to_apicid(int mps_cpu)
                return BAD_APICID;
 }
 
-static inline int apicid_to_node(int logical_apicid) 
+static inline int numaq_apicid_to_node(int logical_apicid) 
 {
        return logical_apicid >> 4;
 }
 
 static inline physid_mask_t apicid_to_cpu_present(int logical_apicid)
 {
-       int node = apicid_to_node(logical_apicid);
+       int node = numaq_apicid_to_node(logical_apicid);
        int cpu = __ffs(logical_apicid & 0xf);
 
        return physid_mask_of_physid(cpu + 4*node);