sh: nmi_debug support.

[linux-block.git] / arch / sh / include / asm / system.h

diff --git a/arch/sh/include/asm/system.h b/arch/sh/include/asm/system.h
index a88895e6dcb06009c4e85522c8f8e4ff3032dcf2..b5c5acdc8c0e546c285d236b651f9207e8fc3c31 100644 (file)
--- a/arch/sh/include/asm/system.h
+++ b/arch/sh/include/asm/system.h
@@ -14,18 +14,6 @@
 
 #define AT_VECTOR_SIZE_ARCH 5 /* entries in ARCH_DLINFO */
 
-#if defined(CONFIG_CPU_SH4A) || defined(CONFIG_CPU_SH5)
-#define __icbi()                       \
-{                                      \
-       unsigned long __addr;           \
-       __addr = 0xa8000000;            \
-       __asm__ __volatile__(           \
-               "icbi   %0\n\t"         \
-               : /* no output */       \
-               : "m" (__m(__addr)));   \
-}
-#endif
-
 /*
  * A brief note on ctrl_barrier(), the control register write barrier.
  *
@@ -44,7 +32,7 @@
 #define mb()           __asm__ __volatile__ ("synco": : :"memory")
 #define rmb()          mb()
 #define wmb()          __asm__ __volatile__ ("synco": : :"memory")
-#define ctrl_barrier() __icbi()
+#define ctrl_barrier() __icbi(0xa8000000)
 #define read_barrier_depends() do { } while(0)
 #else
 #define mb()           __asm__ __volatile__ ("": : :"memory")
@@ -154,6 +142,7 @@ extern struct dentry *sh_debugfs_root;
 
 void per_cpu_trap_init(void);
 void default_idle(void);
+void cpu_idle_wait(void);
 
 asmlinkage void break_point_trap(void);
 
@@ -180,6 +169,11 @@ BUILD_TRAP_HANDLER(breakpoint);
 BUILD_TRAP_HANDLER(singlestep);
 BUILD_TRAP_HANDLER(fpu_error);
 BUILD_TRAP_HANDLER(fpu_state_restore);
+BUILD_TRAP_HANDLER(nmi);
+
+#ifdef CONFIG_BUG
+extern void handle_BUG(struct pt_regs *);
+#endif
 
 #define arch_align_stack(x) (x)