Merge patch series "RISC-V: Test th.sxstatus.MAEE bit before enabling MAEE"
[linux-block.git] / arch / riscv / include / asm / errata_list.h
index 9bad9dfa2f7a167a6f1066de2ad2f4b4d8419d78..efd851e1b48321e1f098008ce8fe7755ab49339d 100644 (file)
@@ -12,8 +12,8 @@
 #include <asm/vendorid_list.h>
 
 #ifdef CONFIG_ERRATA_ANDES
-#define ERRATA_ANDESTECH_NO_IOCP       0
-#define ERRATA_ANDESTECH_NUMBER                1
+#define ERRATA_ANDES_NO_IOCP 0
+#define ERRATA_ANDES_NUMBER 1
 #endif
 
 #ifdef CONFIG_ERRATA_SIFIVE
@@ -112,15 +112,6 @@ asm volatile(ALTERNATIVE(                                          \
 #define THEAD_C9XX_RV_IRQ_PMU                  17
 #define THEAD_C9XX_CSR_SCOUNTEROF              0x5c5
 
-#define ALT_SBI_PMU_OVERFLOW(__ovl)                                    \
-asm volatile(ALTERNATIVE(                                              \
-       "csrr %0, " __stringify(CSR_SSCOUNTOVF),                        \
-       "csrr %0, " __stringify(THEAD_C9XX_CSR_SCOUNTEROF),             \
-               THEAD_VENDOR_ID, ERRATA_THEAD_PMU,                      \
-               CONFIG_ERRATA_THEAD_PMU)                                \
-       : "=r" (__ovl) :                                                \
-       : "memory")
-
 #endif /* __ASSEMBLY__ */
 
 #endif