powerpc/64s: Move hash MMU support code under CONFIG_PPC_64S_HASH_MMU

[linux-2.6-block.git] / arch / powerpc / platforms / powernv / setup.c

diff --git a/arch/powerpc/platforms/powernv/setup.c b/arch/powerpc/platforms/powernv/setup.c
index ad56a54ac9c574e913a078f9c8f2ee6bee8b9688..f37d6524a24d81e9562a9b18ee8d458f2c22a666 100644 (file)
--- a/arch/powerpc/platforms/powernv/setup.c
+++ b/arch/powerpc/platforms/powernv/setup.c
@@ -123,10 +123,14 @@ static void pnv_setup_security_mitigations(void)
        }
 
        /*
-        * If we are non-Power9 bare metal, we don't need to flush on kernel
-        * entry or after user access: they fix a P9 specific vulnerability.
+        * The issues addressed by the entry and uaccess flush don't affect P7
+        * or P8, so on bare metal disable them explicitly in case firmware does
+        * not include the features to disable them. POWER9 and newer processors
+        * should have the appropriate firmware flags.
         */
-       if (!pvr_version_is(PVR_POWER9)) {
+       if (pvr_version_is(PVR_POWER7) || pvr_version_is(PVR_POWER7p) ||
+           pvr_version_is(PVR_POWER8E) || pvr_version_is(PVR_POWER8NVL) ||
+           pvr_version_is(PVR_POWER8)) {
                security_ftr_clear(SEC_FTR_L1D_FLUSH_ENTRY);
                security_ftr_clear(SEC_FTR_L1D_FLUSH_UACCESS);
        }
@@ -207,6 +211,7 @@ static void __init pnv_init(void)
 #endif
                add_preferred_console("hvc", 0, NULL);
 
+#ifdef CONFIG_PPC_64S_HASH_MMU
        if (!radix_enabled()) {
                size_t size = sizeof(struct slb_entry) * mmu_slb_size;
                int i;
@@ -219,6 +224,7 @@ static void __init pnv_init(void)
                                                cpu_to_node(i));
                }
        }
+#endif
 }
 
 static void __init pnv_init_IRQ(void)