powerpc/fsl-booke-64: Don't limit ppc64_rma_size to one TLB entry

[linux-2.6-block.git] / arch / powerpc / mm / tlb_nohash.c

diff --git a/arch/powerpc/mm/tlb_nohash.c b/arch/powerpc/mm/tlb_nohash.c
index a7381fbdd6ab74f508e1a82632dd7cd41aa79cdc..bb04e4df31008089e5390619dc52a7c6c26d5f7b 100644 (file)
--- a/arch/powerpc/mm/tlb_nohash.c
+++ b/arch/powerpc/mm/tlb_nohash.c
@@ -648,7 +648,7 @@ static void early_init_this_mmu(void)
 
                if (map)
                        linear_map_top = map_mem_in_cams(linear_map_top,
-                                                        num_cams);
+                                                        num_cams, false);
        }
 #endif
 
@@ -746,10 +746,14 @@ void setup_initial_memory_limit(phys_addr_t first_memblock_base,
         * entries are supported though that may eventually
         * change.
         *
-        * on FSL Embedded 64-bit, we adjust the RMA size to match the
-        * first bolted TLB entry size.  We still limit max to 1G even if
-        * the TLB could cover more.  This is due to what the early init
-        * code is setup to do.
+        * on FSL Embedded 64-bit, usually all RAM is bolted, but with
+        * unusual memory sizes it's possible for some RAM to not be mapped
+        * (such RAM is not used at all by Linux, since we don't support
+        * highmem on 64-bit).  We limit ppc64_rma_size to what would be
+        * mappable if this memblock is the only one.  Additional memblocks
+        * can only increase, not decrease, the amount that ends up getting
+        * mapped.  We still limit max to 1G even if we'll eventually map
+        * more.  This is due to what the early init code is set up to do.
         *
         * We crop it to the size of the first MEMBLOCK to
         * avoid going over total available memory just in case...
@@ -757,8 +761,14 @@ void setup_initial_memory_limit(phys_addr_t first_memblock_base,
 #ifdef CONFIG_PPC_FSL_BOOK3E
        if (mmu_has_feature(MMU_FTR_TYPE_FSL_E)) {
                unsigned long linear_sz;
-               linear_sz = calc_cam_sz(first_memblock_size, PAGE_OFFSET,
-                                       first_memblock_base);
+               unsigned int num_cams;
+
+               /* use a quarter of the TLBCAM for bolted linear map */
+               num_cams = (mfspr(SPRN_TLB1CFG) & TLBnCFG_N_ENTRY) / 4;
+
+               linear_sz = map_mem_in_cams(first_memblock_size, num_cams,
+                                           true);
+
                ppc64_rma_size = min_t(u64, linear_sz, 0x40000000);
        } else
 #endif