Merge branch 'misc.compat' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs

[linux-block.git] / arch / powerpc / kernel / signal_32.c

diff --git a/arch/powerpc/kernel/signal_32.c b/arch/powerpc/kernel/signal_32.c
index 1a969925bf800e9adce6a2c098322f77ffa3e6e4..9ffd73296f649490cc5c31c3b14b789244a5b337 100644 (file)
--- a/arch/powerpc/kernel/signal_32.c
+++ b/arch/powerpc/kernel/signal_32.c
@@ -492,6 +492,8 @@ static int save_tm_user_regs(struct pt_regs *regs,
 {
        unsigned long msr = regs->msr;
 
+       WARN_ON(tm_suspend_disabled);
+
        /* Remove TM bits from thread's MSR.  The MSR in the sigcontext
         * just indicates to userland that we were doing a transaction, but we
         * don't want to return in transactional state.  This also ensures
@@ -742,6 +744,8 @@ static long restore_tm_user_regs(struct pt_regs *regs,
        int i;
 #endif
 
+       if (tm_suspend_disabled)
+               return 1;
        /*
         * restore general registers but not including MSR or SOFTE. Also
         * take care of keeping r2 (TLS) intact if not a signal.
@@ -849,7 +853,7 @@ static long restore_tm_user_regs(struct pt_regs *regs,
        /* Make sure the transaction is marked as failed */
        current->thread.tm_texasr |= TEXASR_FS;
        /* This loads the checkpointed FP/VEC state, if used */
-       tm_recheckpoint(&current->thread, msr);
+       tm_recheckpoint(&current->thread);
 
        /* This loads the speculative FP/VEC state, if used */
        msr_check_and_set(msr & (MSR_FP | MSR_VEC));