MIPS: Refactor dumping of TLB registers for r3k/r4k

[linux-2.6-block.git] / arch / mips / lib / dump_tlb.c

diff --git a/arch/mips/lib/dump_tlb.c b/arch/mips/lib/dump_tlb.c
index 167f35634709b885d734778e85ec5896c07eba0d..519ededbf9a4cc4d6879fdb9856e2076e2506e2f 100644 (file)
--- a/arch/mips/lib/dump_tlb.c
+++ b/arch/mips/lib/dump_tlb.c
@@ -13,6 +13,24 @@
 #include <asm/pgtable.h>
 #include <asm/tlbdebug.h>
 
+void dump_tlb_regs(void)
+{
+       const int field = 2 * sizeof(unsigned long);
+
+       pr_info("Index    : %0x\n", read_c0_index());
+       pr_info("PageMask : %0x\n", read_c0_pagemask());
+       pr_info("EntryHi  : %0*lx\n", field, read_c0_entryhi());
+       pr_info("EntryLo0 : %0*lx\n", field, read_c0_entrylo0());
+       pr_info("EntryLo1 : %0*lx\n", field, read_c0_entrylo1());
+       pr_info("Wired    : %0x\n", read_c0_wired());
+       pr_info("PageGrain: %0x\n", read_c0_pagegrain());
+       if (cpu_has_htw) {
+               pr_info("PWField  : %0*lx\n", field, read_c0_pwfield());
+               pr_info("PWSize   : %0*lx\n", field, read_c0_pwsize());
+               pr_info("PWCtl    : %0x\n", read_c0_pwctl());
+       }
+}
+
 static inline const char *msk2str(unsigned int mask)
 {
        switch (mask) {