MIPS: Loongson: Add oprofile support

[linux-2.6-block.git] / arch / mips / lemote / lm2e / irq.c

diff --git a/arch/mips/lemote/lm2e/irq.c b/arch/mips/lemote/lm2e/irq.c
index 1d0a09f3b832a69d4617f37222209fc1a569cc0b..9585f5aa7cce7bf8d0a134a3ce6a7842b9673347 100644 (file)
--- a/arch/mips/lemote/lm2e/irq.c
+++ b/arch/mips/lemote/lm2e/irq.c
@@ -6,35 +6,14 @@
  *  under  the terms of  the GNU General  Public License as published by the
  *  Free Software Foundation;  either version 2 of the  License, or (at your
  *  option) any later version.
- *
- *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
- *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
- *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
- *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
- *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
- *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
- *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- *  You should have received a copy of the  GNU General Public License along
- *  with this program; if not, write  to the Free Software Foundation, Inc.,
- *  675 Mass Ave, Cambridge, MA 02139, USA.
- *
  */
 #include <linux/delay.h>
-#include <linux/io.h>
-#include <linux/init.h>
 #include <linux/interrupt.h>
-#include <linux/irq.h>
 
 #include <asm/irq_cpu.h>
 #include <asm/i8259.h>
-#include <asm/mipsregs.h>
-#include <asm/mips-boards/bonito64.h>
-
 
+#include <loongson.h>
 /*
  * the first level int-handler will jump here if it is a bonito irq
  */
@@ -67,27 +46,26 @@ static void i8259_irqdispatch(void)
        int irq;
 
        irq = i8259_irq();
-       if (irq >= 0) {
+       if (irq >= 0)
                do_IRQ(irq);
-       } else {
+       else
                spurious_interrupt();
-       }
-
 }
 
 asmlinkage void plat_irq_dispatch(void)
 {
        unsigned int pending = read_c0_cause() & read_c0_status() & ST0_IM;
 
-       if (pending & CAUSEF_IP7) {
+       if (pending & CAUSEF_IP7)
                do_IRQ(MIPS_CPU_IRQ_BASE + 7);
-       } else if (pending & CAUSEF_IP5) {
+       else if (pending & CAUSEF_IP6) /* perf counter loverflow */
+               do_IRQ(LOONGSON2_PERFCNT_IRQ);
+       else if (pending & CAUSEF_IP5)
                i8259_irqdispatch();
-       } else if (pending & CAUSEF_IP2) {
+       else if (pending & CAUSEF_IP2)
                bonito_irqdispatch();
-       } else {
+       else
                spurious_interrupt();
-       }
 }
 
 static struct irqaction cascade_irqaction = {
@@ -97,8 +75,6 @@ static struct irqaction cascade_irqaction = {
 
 void __init arch_init_irq(void)
 {
-       extern void bonito_irq_init(void);
-
        /*
         * Clear all of the interrupts while we change the able around a bit.
         * int-handler is not on bootstrap
@@ -128,16 +104,8 @@ void __init arch_init_irq(void)
        init_i8259_irqs();
        bonito_irq_init();
 
-       /*
-       printk("GPIODATA=%x, GPIOIE=%x\n", BONITO_GPIODATA, BONITO_GPIOIE);
-       printk("INTEN=%x, INTSET=%x, INTCLR=%x, INTISR=%x\n",
-                       BONITO_INTEN, BONITO_INTENSET,
-                       BONITO_INTENCLR, BONITO_INTISR);
-       */
-
        /* bonito irq at IP2 */
        setup_irq(MIPS_CPU_IRQ_BASE + 2, &cascade_irqaction);
        /* 8259 irq at IP5 */
        setup_irq(MIPS_CPU_IRQ_BASE + 5, &cascade_irqaction);
-
 }