Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

[linux-block.git] / arch / mips / jz4740 / board-qi_lb60.c

diff --git a/arch/mips/jz4740/board-qi_lb60.c b/arch/mips/jz4740/board-qi_lb60.c
index 071e9d94eea786683b3723ce3a0dd4ba62cd66e5..4a7a80c358c75d673f3a6479483cf3d4ee8583a1 100644 (file)
--- a/arch/mips/jz4740/board-qi_lb60.c
+++ b/arch/mips/jz4740/board-qi_lb60.c
@@ -37,8 +37,6 @@
 
 #include <asm/mach-jz4740/platform.h>
 
-#include "clock.h"
-
 /* GPIOs */
 #define QI_LB60_GPIO_KEYOUT(x)         (JZ_GPIO_PORTC(10) + (x))
 #define QI_LB60_GPIO_KEYIN(x)          (JZ_GPIO_PORTD(18) + (x))
@@ -466,27 +464,27 @@ static unsigned long pin_cfg_bias_disable[] = {
 static struct pinctrl_map pin_map[] __initdata = {
        /* NAND pin configuration */
        PIN_MAP_MUX_GROUP_DEFAULT("jz4740-nand",
-                       "10010000.jz4740-pinctrl", "nand", "nand-cs1"),
+                       "10010000.pin-controller", "nand-cs1", "nand"),
 
        /* fbdev pin configuration */
        PIN_MAP_MUX_GROUP("jz4740-fb", PINCTRL_STATE_DEFAULT,
-                       "10010000.jz4740-pinctrl", "lcd", "lcd-8bit"),
+                       "10010000.pin-controller", "lcd-8bit", "lcd"),
        PIN_MAP_MUX_GROUP("jz4740-fb", PINCTRL_STATE_SLEEP,
-                       "10010000.jz4740-pinctrl", "lcd", "lcd-no-pins"),
+                       "10010000.pin-controller", "lcd-no-pins", "lcd"),
 
        /* MMC pin configuration */
        PIN_MAP_MUX_GROUP_DEFAULT("jz4740-mmc.0",
-                       "10010000.jz4740-pinctrl", "mmc", "mmc-1bit"),
+                       "10010000.pin-controller", "mmc-1bit", "mmc"),
        PIN_MAP_MUX_GROUP_DEFAULT("jz4740-mmc.0",
-                       "10010000.jz4740-pinctrl", "mmc", "mmc-4bit"),
+                       "10010000.pin-controller", "mmc-4bit", "mmc"),
        PIN_MAP_CONFIGS_PIN_DEFAULT("jz4740-mmc.0",
-                       "10010000.jz4740-pinctrl", "PD0", pin_cfg_bias_disable),
+                       "10010000.pin-controller", "PD0", pin_cfg_bias_disable),
        PIN_MAP_CONFIGS_PIN_DEFAULT("jz4740-mmc.0",
-                       "10010000.jz4740-pinctrl", "PD2", pin_cfg_bias_disable),
+                       "10010000.pin-controller", "PD2", pin_cfg_bias_disable),
 
        /* PWM pin configuration */
        PIN_MAP_MUX_GROUP_DEFAULT("jz4740-pwm",
-                       "10010000.jz4740-pinctrl", "pwm4", "pwm4"),
+                       "10010000.pin-controller", "pwm4", "pwm4"),
 };