select ARCH_HAS_UBSAN_SANITIZE_ALL
select ARCH_HAS_GCOV_PROFILE_ALL
select ARCH_KEEP_MEMBLOCK
- select ARCH_SUPPORTS_UPROBES
select ARCH_USE_BUILTIN_BSWAP
select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
select ARCH_USE_MEMTEST
select GENERIC_SMP_IDLE_THREAD
select GENERIC_TIME_VSYSCALL
select GUP_GET_PXX_LOW_HIGH if CPU_MIPS32 && PHYS_ADDR_T_64BIT
+ select HAS_IOPORT if !NO_IOPORT_MAP || ISA
select HAVE_ARCH_COMPILER_H
select HAVE_ARCH_JUMP_LABEL
select HAVE_ARCH_KGDB if MIPS_FP_SUPPORT
select SYS_SUPPORTS_LITTLE_ENDIAN
select SYS_SUPPORTS_ZBOOT
select DMA_NONCOHERENT
- select ARCH_HAS_SYNC_DMA_FOR_CPU
select IRQ_MIPS_CPU
select PINCTRL
select GPIOLIB
config MIPS_GENERIC_KERNEL
bool "Generic board-agnostic MIPS kernel"
- select ARCH_HAS_SETUP_DMA_OPS
select MIPS_GENERIC
select BOOT_RAW
select BUILTIN_DTB
select BOARD_SCACHE
select CSRC_R4K
select CEVT_R4K
- select CPU_HAS_WB
select FORCE_PCI
select ISA
select I8259
select SYS_SUPPORTS_LITTLE_ENDIAN
select SYS_SUPPORTS_MICROMIPS
select SYS_SUPPORTS_MIPS16
- select SYS_SUPPORTS_MIPS_CMP
select SYS_SUPPORTS_MIPS_CPS
select SYS_SUPPORTS_MULTITHREADING
select SYS_SUPPORTS_RELOCATABLE
help
If you want this kernel to run on SGI O2 workstation, say Y here.
-config SIBYTE_CRHINE
- bool "Sibyte BCM91120C-CRhine"
- select BOOT_ELF32
- select SIBYTE_BCM1120
- select SWAP_IO_SPACE
- select SYS_HAS_CPU_SB1
- select SYS_SUPPORTS_BIG_ENDIAN
- select SYS_SUPPORTS_LITTLE_ENDIAN
-
-config SIBYTE_CARMEL
- bool "Sibyte BCM91120x-Carmel"
- select BOOT_ELF32
- select SIBYTE_BCM1120
- select SWAP_IO_SPACE
- select SYS_HAS_CPU_SB1
- select SYS_SUPPORTS_BIG_ENDIAN
- select SYS_SUPPORTS_LITTLE_ENDIAN
-
config SIBYTE_CRHONE
bool "Sibyte BCM91125C-CRhone"
select BOOT_ELF32
config SIBYTE_RHONE
bool "Sibyte BCM91125E-Rhone"
select BOOT_ELF32
- select SIBYTE_BCM1125H
+ select SIBYTE_SB1250
select SWAP_IO_SPACE
select SYS_HAS_CPU_SB1
select SYS_SUPPORTS_BIG_ENDIAN
bool
config ARCH_SUPPORTS_UPROBES
- bool
+ def_bool y
config DMA_NONCOHERENT
bool
# by pgprot_writcombine can be mixed, and the latter sometimes provides
# significant advantages.
#
+ select ARCH_HAS_SETUP_DMA_OPS
select ARCH_HAS_DMA_WRITE_COMBINE
select ARCH_HAS_DMA_PREP_COHERENT
+ select ARCH_HAS_SYNC_DMA_FOR_CPU
select ARCH_HAS_SYNC_DMA_FOR_DEVICE
select ARCH_HAS_DMA_SET_UNCACHED
select DMA_NONCOHERENT_MMAP
config MIPS_HUGE_TLB_SUPPORT
def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE
-config IRQ_MSP_SLP
- bool
-
-config IRQ_MSP_CIC
- bool
-
config IRQ_TXX9
bool
bool "Loongson 2F"
depends on SYS_HAS_CPU_LOONGSON2F
select CPU_LOONGSON2EF
- select GPIOLIB
help
The Loongson 2F processor implements the MIPS III instruction set
with many extensions.
select CPU_SUPPORTS_64BIT_KERNEL
select CPU_SUPPORTS_HIGHMEM
select CPU_SUPPORTS_HUGEPAGES
- select ARCH_HAS_PHYS_TO_DMA
config CPU_LOONGSON32
bool
config SYS_HAS_CPU_MIPS32_R5
bool
- select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
config SYS_HAS_CPU_MIPS32_R6
bool
- select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
config SYS_HAS_CPU_MIPS64_R1
bool
config SYS_HAS_CPU_MIPS64_R5
bool
- select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
config SYS_HAS_CPU_MIPS64_R6
bool
- select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
config SYS_HAS_CPU_P5600
bool
- select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
config SYS_HAS_CPU_R3000
bool
config SYS_HAS_CPU_R10000
bool
- select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
config SYS_HAS_CPU_RM7000
bool
config SYS_HAS_CPU_BMIPS5000
bool
select SYS_HAS_CPU_BMIPS
- select ARCH_HAS_SYNC_DMA_FOR_CPU
#
# CPU may reorder R->R, R->W, W->R, W->W
config ARCH_FORCE_MAX_ORDER
int "Maximum zone order"
- range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
- default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
- range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
- default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
- range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
- default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
- range 0 64
- default "11"
+ default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
+ default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
+ default "11" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
+ default "10"
help
The kernel memory allocator divides physically contiguous memory
blocks into "zones", where each zone is a power of two number of
blocks of physically contiguous memory, then you may need to
increase this value.
- This config option is actually maximum order plus one. For example,
- a value of 11 means that the largest free memory block is 2^10 pages.
-
The page size is not necessarily 4KB. Keep this in mind
when choosing a value for this option.
Includes a loader for loading an elf relocatable object
onto another VPE and running it.
-config MIPS_VPE_LOADER_CMP
- bool
- default "y"
- depends on MIPS_VPE_LOADER && MIPS_CMP
-
config MIPS_VPE_LOADER_MT
bool
default "y"
- depends on MIPS_VPE_LOADER && !MIPS_CMP
+ depends on MIPS_VPE_LOADER
config MIPS_VPE_LOADER_TOM
bool "Load VPE program into memory hidden from linux"
bool "Enable support for AP/SP API (RTLX)"
depends on MIPS_VPE_LOADER
-config MIPS_VPE_APSP_API_CMP
- bool
- default "y"
- depends on MIPS_VPE_APSP_API && MIPS_CMP
-
config MIPS_VPE_APSP_API_MT
bool
default "y"
- depends on MIPS_VPE_APSP_API && !MIPS_CMP
-
-config MIPS_CMP
- bool "MIPS CMP framework support (DEPRECATED)"
- depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6
- select SMP
- select SYNC_R4K
- select SYS_SUPPORTS_SMP
- select WEAK_ORDERING
- default n
- help
- Select this if you are using a bootloader which implements the "CMP
- framework" protocol (ie. YAMON) and want your kernel to make use of
- its ability to start secondary CPUs.
-
- Unless you have a specific need, you should use CONFIG_MIPS_CPS
- instead of this.
+ depends on MIPS_VPE_APSP_API
config MIPS_CPS
bool "MIPS Coherent Processing System support"
config SMP_UP
bool
-config SYS_SUPPORTS_MIPS_CMP
- bool
-
config SYS_SUPPORTS_MIPS_CPS
bool
projects / linux-block.git / blobdiff