#include <asm/smp.h>
#include <asm/system.h>
#include <asm/unistd.h>
-#include <asm/system.h>
+#include <asm/hpsim.h>
#if defined(CONFIG_SMP) && (IA64_CPU_SIZE > PAGE_SIZE)
# error "struct cpuinfo_ia64 too big!"
if (!efi_setup_pcdp_console(cmdline))
earlycons++;
#endif
+ if (!simcons_register())
+ earlycons++;
return (earlycons) ? 0 : -1;
}
efi_init();
io_port_init();
- parse_early_param();
-
#ifdef CONFIG_IA64_GENERIC
- machvec_init(NULL);
+ /* machvec needs to be parsed from the command line
+ * before parse_early_param() is called to ensure
+ * that ia64_mv is initialised before any command line
+ * settings may cause console setup to occur
+ */
+ machvec_init_from_cmdline(*cmdline_p);
#endif
+ parse_early_param();
+
if (early_console_setup(*cmdline_p) == 0)
mark_bsp_online();
#ifdef CONFIG_SMP
cpu_physical_id(0) = hard_smp_processor_id();
-
- cpu_set(0, cpu_sibling_map[0]);
- cpu_set(0, cpu_core_map[0]);
-
check_for_logical_procs();
if (smp_num_cpucores > 1)
printk(KERN_INFO
void *cpu_data;
cpu_data = per_cpu_init();
+ /*
+ * insert boot cpu into sibling and core mapes
+ * (must be done after per_cpu area is setup)
+ */
+ if (smp_processor_id() == 0) {
+ cpu_set(0, per_cpu(cpu_sibling_map, 0));
+ cpu_set(0, cpu_core_map[0]);
+ }
/*
* We set ar.k3 so that assembly code in MCA handler can compute
/* clear TPR & XTP to enable all interrupt classes: */
ia64_setreg(_IA64_REG_CR_TPR, 0);
+
+ /* Clear any pending interrupts left by SAL/EFI */
+ while (ia64_get_ivr() != IA64_SPURIOUS_INT_VECTOR)
+ ia64_eoi();
+
#ifdef CONFIG_SMP
normal_xtp();
#endif