Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64...

[linux-2.6-block.git] / arch / arm64 / kvm / hyp / switch.c

diff --git a/arch/arm64/kvm/hyp/switch.c b/arch/arm64/kvm/hyp/switch.c
index 421ebf6f708630416a41a975f9b6c2a7d6eff1fe..3563fe655cd53f366ddc5897606b0db5c9c27f73 100644 (file)
--- a/arch/arm64/kvm/hyp/switch.c
+++ b/arch/arm64/kvm/hyp/switch.c
@@ -22,6 +22,7 @@
 
 #include <kvm/arm_psci.h>
 
+#include <asm/arch_gicv3.h>
 #include <asm/cpufeature.h>
 #include <asm/kprobes.h>
 #include <asm/kvm_asm.h>
@@ -525,6 +526,17 @@ int __hyp_text __kvm_vcpu_run_nvhe(struct kvm_vcpu *vcpu)
        struct kvm_cpu_context *guest_ctxt;
        u64 exit_code;
 
+       /*
+        * Having IRQs masked via PMR when entering the guest means the GIC
+        * will not signal the CPU of interrupts of lower priority, and the
+        * only way to get out will be via guest exceptions.
+        * Naturally, we want to avoid this.
+        */
+       if (system_uses_irq_prio_masking()) {
+               gic_write_pmr(GIC_PRIO_IRQON);
+               dsb(sy);
+       }
+
        vcpu = kern_hyp_va(vcpu);
 
        host_ctxt = kern_hyp_va(vcpu->arch.host_cpu_context);
@@ -577,6 +589,10 @@ int __hyp_text __kvm_vcpu_run_nvhe(struct kvm_vcpu *vcpu)
         */
        __debug_switch_to_host(vcpu);
 
+       /* Returning to host will clear PSR.I, remask PMR if needed */
+       if (system_uses_irq_prio_masking())
+               gic_write_pmr(GIC_PRIO_IRQOFF);
+
        return exit_code;
 }