arm64: dts: ti: k3-am62p: Add ITAP/OTAP values for MMC
[linux-block.git] / arch / arm64 / boot / dts / ti / k3-am62p-main.dtsi
index 4c51bae06b57eb58e26f291f214856f0e70d885e..e43530beb79ff6a3a6a0ef79ee1fe3dbf60217ed 100644 (file)
@@ -1,7 +1,7 @@
-// SPDX-License-Identifier: GPL-2.0
+// SPDX-License-Identifier: GPL-2.0-only OR MIT
 /*
  * Device Tree file for the AM62P main domain peripherals
- * Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/
+ * Copyright (C) 2023-2024 Texas Instruments Incorporated - https://www.ti.com/
  */
 
 &cbass_main {
                clock-names = "clk_ahb", "clk_xin";
                assigned-clocks = <&k3_clks 57 2>;
                assigned-clock-parents = <&k3_clks 57 4>;
-               ti,otap-del-sel-legacy = <0x0>;
+               bus-width = <8>;
+               mmc-ddr-1_8v;
+               mmc-hs200-1_8v;
+               mmc-hs400-1_8v;
+               ti,clkbuf-sel = <0x7>;
+               ti,strobe-sel = <0x77>;
+               ti,trm-icp = <0x8>;
+               ti,otap-del-sel-legacy = <0x1>;
+               ti,otap-del-sel-mmc-hs = <0x1>;
+               ti,otap-del-sel-ddr52 = <0x6>;
+               ti,otap-del-sel-hs200 = <0x8>;
+               ti,otap-del-sel-hs400 = <0x5>;
+               ti,itap-del-sel-legacy = <0x10>;
+               ti,itap-del-sel-mmc-hs = <0xa>;
+               ti,itap-del-sel-ddr52 = <0x3>;
                status = "disabled";
        };
 
                power-domains = <&k3_pds 58 TI_SCI_PD_EXCLUSIVE>;
                clocks = <&k3_clks 58 5>, <&k3_clks 58 6>;
                clock-names = "clk_ahb", "clk_xin";
-               ti,otap-del-sel-legacy = <0x8>;
+               bus-width = <4>;
+               ti,clkbuf-sel = <0x7>;
+               ti,otap-del-sel-legacy = <0x0>;
+               ti,otap-del-sel-sd-hs = <0x0>;
+               ti,otap-del-sel-sdr12 = <0xf>;
+               ti,otap-del-sel-sdr25 = <0xf>;
+               ti,otap-del-sel-sdr50 = <0xc>;
+               ti,otap-del-sel-ddr50 = <0x9>;
+               ti,otap-del-sel-sdr104 = <0x6>;
+               ti,itap-del-sel-legacy = <0x0>;
+               ti,itap-del-sel-sd-hs = <0x0>;
+               ti,itap-del-sel-sdr12 = <0x0>;
+               ti,itap-del-sel-sdr25 = <0x0>;
                status = "disabled";
        };
 
                power-domains = <&k3_pds 184 TI_SCI_PD_EXCLUSIVE>;
                clocks = <&k3_clks 184 5>, <&k3_clks 184 6>;
                clock-names = "clk_ahb", "clk_xin";
-               ti,otap-del-sel-legacy = <0x8>;
+               bus-width = <4>;
+               ti,clkbuf-sel = <0x7>;
+               ti,otap-del-sel-legacy = <0x0>;
+               ti,otap-del-sel-sd-hs = <0x0>;
+               ti,otap-del-sel-sdr12 = <0xf>;
+               ti,otap-del-sel-sdr25 = <0xf>;
+               ti,otap-del-sel-sdr50 = <0xc>;
+               ti,otap-del-sel-ddr50 = <0x9>;
+               ti,otap-del-sel-sdr104 = <0x6>;
+               ti,itap-del-sel-legacy = <0x0>;
+               ti,itap-del-sel-sd-hs = <0x0>;
+               ti,itap-del-sel-sdr12 = <0x0>;
+               ti,itap-del-sel-sdr25 = <0x0>;
                status = "disabled";
        };