arm64: dts: qcom: Add initial set of PMIC and SoC pins for APQ8016 SBC board

[linux-2.6-block.git] / arch / arm64 / boot / dts / qcom / msm8916.dtsi

diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi
index f212b8303d04ffaac3c2d53bdd7ce9239e963548..0f49ebd0aa8b24a1cfc0ed77ae30f08c3f548c19 100644 (file)
--- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
@@ -77,7 +77,12 @@
                ranges = <0 0 0 0xffffffff>;
                compatible = "simple-bus";
 
-               pinctrl@1000000 {
+               restart@4ab000 {
+                       compatible = "qcom,pshold";
+                       reg = <0x4ab000 0x4>;
+               };
+
+               msmgpio: pinctrl@1000000 {
                        compatible = "qcom,msm8916-pinctrl";
                        reg = <0x1000000 0x300000>;
                        interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
@@ -192,5 +197,23 @@
                                status = "disabled";
                        };
                };
+
+               spmi_bus: spmi@200f000 {
+                       compatible = "qcom,spmi-pmic-arb";
+                       reg = <0x200f000 0x001000>,
+                             <0x2400000 0x400000>,
+                             <0x2c00000 0x400000>,
+                             <0x3800000 0x200000>,
+                             <0x200a000 0x002100>;
+                       reg-names = "core", "chnls", "obsrvr", "intr", "cnfg";
+                       interrupt-names = "periph_irq";
+                       interrupts = <GIC_SPI 190 IRQ_TYPE_NONE>;
+                       qcom,ee = <0>;
+                       qcom,channel = <0>;
+                       #address-cells = <2>;
+                       #size-cells = <0>;
+                       interrupt-controller;
+                       #interrupt-cells = <4>;
+               };
        };
 };