arm64: dts: marvell: improve SPI flash description on Armada 7040-DB
[linux-2.6-block.git] / arch / arm64 / boot / dts / marvell / armada-ap806.dtsi
index 556a92bcc2f600ce0d486c597feb9493875653d1..38be1928f550a0f3d84ade8beae101de0292dbc9 100644 (file)
        #address-cells = <2>;
        #size-cells = <2>;
 
+       aliases {
+               serial0 = &uart0;
+               serial1 = &uart1;
+       };
+
        psci {
                compatible = "arm,psci-0.2";
                method = "smc";
        };
 
-
        ap806 {
                #address-cells = <2>;
                #size-cells = <2>;
                                marvell,spi-base = <128>, <136>, <144>, <152>;
                        };
 
-                       xor0@400000 {
+                       xor@400000 {
                                compatible = "marvell,mv-xor-v2";
                                reg = <0x400000 0x1000>,
                                      <0x410000 0x1000>;
                                dma-coherent;
                        };
 
-                       xor1@420000 {
+                       xor@420000 {
                                compatible = "marvell,mv-xor-v2";
                                reg = <0x420000 0x1000>,
                                      <0x430000 0x1000>;
                                dma-coherent;
                        };
 
-                       xor2@440000 {
+                       xor@440000 {
                                compatible = "marvell,mv-xor-v2";
                                reg = <0x440000 0x1000>,
                                      <0x450000 0x1000>;
                                dma-coherent;
                        };
 
-                       xor3@460000 {
+                       xor@460000 {
                                compatible = "marvell,mv-xor-v2";
                                reg = <0x460000 0x1000>,
                                      <0x470000 0x1000>;
                                #size-cells = <0>;
                                cell-index = <0>;
                                interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
-                               clocks = <&ringclk 2>;
+                               clocks = <&ap_syscon 3>;
                                status = "disabled";
                        };
 
                                #size-cells = <0>;
                                interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
                                timeout-ms = <1000>;
-                               clocks = <&ringclk 2>;
+                               clocks = <&ap_syscon 3>;
                                status = "disabled";
                        };
 
-                       serial@512000 {
+                       uart0: serial@512000 {
                                compatible = "snps,dw-apb-uart";
                                reg = <0x512000 0x100>;
                                reg-shift = <2>;
                                interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
                                reg-io-width = <1>;
-                               clocks = <&ringclk 2>;
+                               clocks = <&ap_syscon 3>;
                                status = "disabled";
                        };
 
-                       serial@512100 {
+                       uart1: serial@512100 {
                                compatible = "snps,dw-apb-uart";
                                reg = <0x512100 0x100>;
                                reg-shift = <2>;
                                interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
                                reg-io-width = <1>;
-                               clocks = <&ringclk 2>;
+                               clocks = <&ap_syscon 3>;
                                status = "disabled";
 
                        };
 
-                       dfx-server@6f8000 {
-                               compatible = "simple-mfd", "syscon";
-                               reg = <0x6f8000 0x70000>;
-
-                               coreclk: clk@204 {
-                                       compatible = "marvell,armada-ap806-core-clock";
-                                       #clock-cells = <1>;
-                                       clock-output-names = "ddr", "ring", "cpu";
-                               };
-
-                               ringclk: clk@250 {
-                                       compatible = "marvell,armada-ap806-ring-clock";
-                                       #clock-cells = <1>;
-                                       clock-output-names = "ring-0", "ring-2",
-                                                            "ring-3", "ring-4",
-                                                            "ring-5";
-                                       clocks = <&coreclk 1>;
-                               };
+                       ap_syscon: system-controller@6f4000 {
+                               compatible = "marvell,ap806-system-controller",
+                                            "syscon";
+                               #clock-cells = <1>;
+                               clock-output-names = "ap-cpu-cluster-0",
+                                                    "ap-cpu-cluster-1",
+                                                    "ap-fixed", "ap-mss";
+                               reg = <0x6f4000 0x1000>;
                        };
                };
        };
-
 };
-