Merge tag 'soc-dt-6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

[linux-block.git] / arch / arm64 / boot / dts / freescale / imx8mn.dtsi

diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
index 9e0ddd6b7a322d269658c8a886fe1df9a59e9214..c94ab45ee96c38dbcc13a4c2bca334985892d9fa 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
@@ -1062,6 +1062,61 @@
                        #size-cells = <1>;
                        ranges;
 
+                       lcdif: lcdif@32e00000 {
+                               compatible = "fsl,imx8mn-lcdif", "fsl,imx6sx-lcdif";
+                               reg = <0x32e00000 0x10000>;
+                               clocks = <&clk IMX8MN_CLK_DISP_PIXEL_ROOT>,
+                                        <&clk IMX8MN_CLK_DISP_APB_ROOT>,
+                                        <&clk IMX8MN_CLK_DISP_AXI_ROOT>;
+                               clock-names = "pix", "axi", "disp_axi";
+                               assigned-clocks = <&clk IMX8MN_CLK_DISP_PIXEL_ROOT>,
+                                                 <&clk IMX8MN_CLK_DISP_AXI>,
+                                                 <&clk IMX8MN_CLK_DISP_APB>;
+                               assigned-clock-parents = <&clk IMX8MN_CLK_DISP_PIXEL>,
+                                                        <&clk IMX8MN_SYS_PLL2_1000M>,
+                                                        <&clk IMX8MN_SYS_PLL1_800M>;
+                               assigned-clock-rates = <594000000>, <500000000>, <200000000>;
+                               interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
+                               power-domains = <&disp_blk_ctrl IMX8MN_DISPBLK_PD_LCDIF>;
+                               status = "disabled";
+
+                               port {
+                                       lcdif_to_dsim: endpoint {
+                                               remote-endpoint = <&dsim_from_lcdif>;
+                                       };
+                               };
+                       };
+
+                       mipi_dsi: dsi@32e10000 {
+                               compatible = "fsl,imx8mn-mipi-dsim", "fsl,imx8mm-mipi-dsim";
+                               reg = <0x32e10000 0x400>;
+                               clocks = <&clk IMX8MN_CLK_DSI_CORE>,
+                                        <&clk IMX8MN_CLK_DSI_PHY_REF>;
+                               clock-names = "bus_clk", "sclk_mipi";
+                               assigned-clocks = <&clk IMX8MN_CLK_DSI_CORE>,
+                                                 <&clk IMX8MN_CLK_DSI_PHY_REF>;
+                               assigned-clock-parents = <&clk IMX8MN_SYS_PLL1_266M>,
+                                                        <&clk IMX8MN_CLK_24M>;
+                               assigned-clock-rates = <266000000>, <24000000>;
+                               samsung,pll-clock-frequency = <24000000>;
+                               interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
+                               power-domains = <&disp_blk_ctrl IMX8MN_DISPBLK_PD_MIPI_DSI>;
+                               status = "disabled";
+
+                               ports {
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+
+                                       port@0 {
+                                               reg = <0>;
+
+                                               dsim_from_lcdif: endpoint {
+                                                       remote-endpoint = <&lcdif_to_dsim>;
+                                               };
+                                       };
+                               };
+                       };
+
                        disp_blk_ctrl: blk-ctrl@32e28000 {
                                compatible = "fsl,imx8mn-disp-blk-ctrl", "syscon";
                                reg = <0x32e28000 0x100>;