Merge tag 'usb-6.4-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb

[linux-block.git] / arch / arm64 / boot / dts / freescale / imx8mm.dtsi

diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
index 31f4548f85cfa544921b00a0f1568a7062af4a6d..d6b36f04f3dc155e19409cd194c849f12d3b4993 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
@@ -1119,6 +1119,61 @@
                        #size-cells = <1>;
                        ranges = <0x32c00000 0x32c00000 0x400000>;
 
+                       lcdif: lcdif@32e00000 {
+                               compatible = "fsl,imx8mm-lcdif", "fsl,imx6sx-lcdif";
+                               reg = <0x32e00000 0x10000>;
+                               clocks = <&clk IMX8MM_CLK_LCDIF_PIXEL>,
+                                        <&clk IMX8MM_CLK_DISP_APB_ROOT>,
+                                        <&clk IMX8MM_CLK_DISP_AXI_ROOT>;
+                               clock-names = "pix", "axi", "disp_axi";
+                               assigned-clocks = <&clk IMX8MM_CLK_LCDIF_PIXEL>,
+                                                 <&clk IMX8MM_CLK_DISP_AXI>,
+                                                 <&clk IMX8MM_CLK_DISP_APB>;
+                               assigned-clock-parents = <&clk IMX8MM_VIDEO_PLL1_OUT>,
+                                                        <&clk IMX8MM_SYS_PLL2_1000M>,
+                                                        <&clk IMX8MM_SYS_PLL1_800M>;
+                               assigned-clock-rates = <594000000>, <500000000>, <200000000>;
+                               interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
+                               power-domains = <&disp_blk_ctrl IMX8MM_DISPBLK_PD_LCDIF>;
+                               status = "disabled";
+
+                               port {
+                                       lcdif_to_dsim: endpoint {
+                                               remote-endpoint = <&dsim_from_lcdif>;
+                                       };
+                               };
+                       };
+
+                       mipi_dsi: dsi@32e10000 {
+                               compatible = "fsl,imx8mm-mipi-dsim";
+                               reg = <0x32e10000 0x400>;
+                               clocks = <&clk IMX8MM_CLK_DSI_CORE>,
+                                        <&clk IMX8MM_CLK_DSI_PHY_REF>;
+                               clock-names = "bus_clk", "sclk_mipi";
+                               assigned-clocks = <&clk IMX8MM_CLK_DSI_CORE>,
+                                                 <&clk IMX8MM_CLK_DSI_PHY_REF>;
+                               assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_266M>,
+                                                        <&clk IMX8MM_CLK_24M>;
+                               assigned-clock-rates = <266000000>, <24000000>;
+                               samsung,pll-clock-frequency = <24000000>;
+                               interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
+                               power-domains = <&disp_blk_ctrl IMX8MM_DISPBLK_PD_MIPI_DSI>;
+                               status = "disabled";
+
+                               ports {
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+
+                                       port@0 {
+                                               reg = <0>;
+
+                                               dsim_from_lcdif: endpoint {
+                                                       remote-endpoint = <&lcdif_to_dsim>;
+                                               };
+                                       };
+                               };
+                       };
+
                        csi: csi@32e20000 {
                                compatible = "fsl,imx8mm-csi", "fsl,imx7-csi";
                                reg = <0x32e20000 0x1000>;
@@ -1198,7 +1253,7 @@
                        };
 
                        usbotg1: usb@32e40000 {
-                               compatible = "fsl,imx8mm-usb", "fsl,imx7d-usb";
+                               compatible = "fsl,imx8mm-usb", "fsl,imx7d-usb", "fsl,imx27-usb";
                                reg = <0x32e40000 0x200>;
                                interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
                                clocks = <&clk IMX8MM_CLK_USB1_CTRL_ROOT>;
@@ -1212,13 +1267,14 @@
                        };
 
                        usbmisc1: usbmisc@32e40200 {
-                               compatible = "fsl,imx8mm-usbmisc", "fsl,imx7d-usbmisc";
+                               compatible = "fsl,imx8mm-usbmisc", "fsl,imx7d-usbmisc",
+                                            "fsl,imx6q-usbmisc";
                                #index-cells = <1>;
                                reg = <0x32e40200 0x200>;
                        };
 
                        usbotg2: usb@32e50000 {
-                               compatible = "fsl,imx8mm-usb", "fsl,imx7d-usb";
+                               compatible = "fsl,imx8mm-usb", "fsl,imx7d-usb", "fsl,imx27-usb";
                                reg = <0x32e50000 0x200>;
                                interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
                                clocks = <&clk IMX8MM_CLK_USB1_CTRL_ROOT>;
@@ -1232,7 +1288,8 @@
                        };
 
                        usbmisc2: usbmisc@32e50200 {
-                               compatible = "fsl,imx8mm-usbmisc", "fsl,imx7d-usbmisc";
+                               compatible = "fsl,imx8mm-usbmisc", "fsl,imx7d-usbmisc",
+                                            "fsl,imx6q-usbmisc";
                                #index-cells = <1>;
                                reg = <0x32e50200 0x200>;
                        };
@@ -1315,6 +1372,30 @@
                        status = "disabled";
                };
 
+               pcie0_ep: pcie-ep@33800000 {
+                       compatible = "fsl,imx8mm-pcie-ep";
+                       reg = <0x33800000 0x400000>,
+                             <0x18000000 0x8000000>;
+                       reg-names = "dbi", "addr_space";
+                       num-lanes = <1>;
+                       interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "dma";
+                       fsl,max-link-speed = <2>;
+                       clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>,
+                                <&clk IMX8MM_CLK_PCIE1_PHY>,
+                                <&clk IMX8MM_CLK_PCIE1_AUX>;
+                       clock-names = "pcie", "pcie_bus", "pcie_aux";
+                       power-domains = <&pgc_pcie>;
+                       resets = <&src IMX8MQ_RESET_PCIE_CTRL_APPS_EN>,
+                                <&src IMX8MQ_RESET_PCIE_CTRL_APPS_TURNOFF>;
+                       reset-names = "apps", "turnoff";
+                       phys = <&pcie_phy>;
+                       phy-names = "pcie-phy";
+                       num-ib-windows = <4>;
+                       num-ob-windows = <4>;
+                       status = "disabled";
+               };
+
                gpu_3d: gpu@38000000 {
                        compatible = "vivante,gc";
                        reg = <0x38000000 0x8000>;