Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
[linux-2.6-block.git] / arch / arm64 / boot / dts / freescale / fsl-ls1028a.dtsi
index 8d03b9c950e13cf88bcd37b9169d2b12b230b712..7975519b4f5616f9b43c180224c20ddf438ea185 100644 (file)
@@ -28,7 +28,7 @@
                        enable-method = "psci";
                        clocks = <&clockgen 1 0>;
                        next-level-cache = <&l2>;
-                       cpu-idle-states = <&CPU_PH20>;
+                       cpu-idle-states = <&CPU_PW20>;
                };
 
                cpu1: cpu@1 {
@@ -38,7 +38,7 @@
                        enable-method = "psci";
                        clocks = <&clockgen 1 0>;
                        next-level-cache = <&l2>;
-                       cpu-idle-states = <&CPU_PH20>;
+                       cpu-idle-states = <&CPU_PW20>;
                };
 
                l2: l2-cache {
                 */
                entry-method = "arm,psci";
 
-               CPU_PH20: cpu-ph20 {
-                       compatible = "arm,idle-state";
-                       idle-state-name = "PH20";
-                       arm,psci-suspend-param = <0x00010000>;
-                       entry-latency-us = <1000>;
-                       exit-latency-us = <1000>;
-                       min-residency-us = <3000>;
+               CPU_PW20: cpu-pw20 {
+                         compatible = "arm,idle-state";
+                         idle-state-name = "PW20";
+                         arm,psci-suspend-param = <0x0>;
+                         entry-latency-us = <2000>;
+                         exit-latency-us = <2000>;
+                         min-residency-us = <6000>;
                };
        };
 
                                compatible = "fsl,enetc";
                                reg = <0x000100 0 0 0 0>;
                        };
+                       ethernet@0,4 {
+                               compatible = "fsl,enetc-ptp";
+                               reg = <0x000400 0 0 0 0>;
+                               clocks = <&clockgen 4 0>;
+                               little-endian;
+                       };
                };
        };