Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next
[linux-2.6-block.git] / arch / arm64 / boot / dts / freescale / fsl-ls1028a.dtsi
index de71153fda006ddf226bdeea10f7c831f9958685..72b9a75976a1f0a3dc4837cbfdd7e02570e3dde7 100644 (file)
@@ -29,6 +29,7 @@
                        clocks = <&clockgen 1 0>;
                        next-level-cache = <&l2>;
                        cpu-idle-states = <&CPU_PW20>;
+                       #cooling-cells = <2>;
                };
 
                cpu1: cpu@1 {
@@ -39,6 +40,7 @@
                        clocks = <&clockgen 1 0>;
                        next-level-cache = <&l2>;
                        cpu-idle-states = <&CPU_PW20>;
+                       #cooling-cells = <2>;
                };
 
                l2: l2-cache {
                clock-output-names = "sysclk";
        };
 
-       dpclk: clock-dp {
+       osc_27m: clock-osc-27m {
                compatible = "fixed-clock";
                #clock-cells = <0>;
                clock-frequency = <27000000>;
-               clock-output-names= "dpclk";
+               clock-output-names = "phy_27m";
+       };
+
+       dpclk: clock-controller@f1f0000 {
+               compatible = "fsl,ls1028a-plldig";
+               reg = <0x0 0xf1f0000 0x0 0xffff>;
+               #clock-cells = <1>;
+               clocks = <&osc_27m>;
        };
 
        aclk: clock-axi {
                        #size-cells = <0>;
                        reg = <0x0 0x2000000 0x0 0x10000>;
                        interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&clockgen 4 1>;
+                       clocks = <&clockgen 4 3>;
                        status = "disabled";
                };
 
                        #size-cells = <0>;
                        reg = <0x0 0x2010000 0x0 0x10000>;
                        interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&clockgen 4 1>;
+                       clocks = <&clockgen 4 3>;
                        status = "disabled";
                };
 
                        #size-cells = <0>;
                        reg = <0x0 0x2020000 0x0 0x10000>;
                        interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&clockgen 4 1>;
+                       clocks = <&clockgen 4 3>;
                        status = "disabled";
                };
 
                        #size-cells = <0>;
                        reg = <0x0 0x2030000 0x0 0x10000>;
                        interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&clockgen 4 1>;
+                       clocks = <&clockgen 4 3>;
                        status = "disabled";
                };
 
                        #size-cells = <0>;
                        reg = <0x0 0x2040000 0x0 0x10000>;
                        interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&clockgen 4 1>;
+                       clocks = <&clockgen 4 3>;
                        status = "disabled";
                };
 
                        #size-cells = <0>;
                        reg = <0x0 0x2050000 0x0 0x10000>;
                        interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&clockgen 4 1>;
+                       clocks = <&clockgen 4 3>;
                        status = "disabled";
                };
 
                        #size-cells = <0>;
                        reg = <0x0 0x2060000 0x0 0x10000>;
                        interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&clockgen 4 1>;
+                       clocks = <&clockgen 4 3>;
                        status = "disabled";
                };
 
                        #size-cells = <0>;
                        reg = <0x0 0x2070000 0x0 0x10000>;
                        interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&clockgen 4 1>;
+                       clocks = <&clockgen 4 3>;
+                       status = "disabled";
+               };
+
+               esdhc: mmc@2140000 {
+                       compatible = "fsl,ls1028a-esdhc", "fsl,esdhc";
+                       reg = <0x0 0x2140000 0x0 0x10000>;
+                       interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
+                       clock-frequency = <0>; /* fixed up by bootloader */
+                       clocks = <&clockgen 2 1>;
+                       voltage-ranges = <1800 1800 3300 3300>;
+                       sdhci,auto-cmd12;
+                       little-endian;
+                       bus-width = <4>;
+                       status = "disabled";
+               };
+
+               esdhc1: mmc@2150000 {
+                       compatible = "fsl,ls1028a-esdhc", "fsl,esdhc";
+                       reg = <0x0 0x2150000 0x0 0x10000>;
+                       interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
+                       clock-frequency = <0>; /* fixed up by bootloader */
+                       clocks = <&clockgen 2 1>;
+                       voltage-ranges = <1800 1800 3300 3300>;
+                       sdhci,auto-cmd12;
+                       broken-cd;
+                       little-endian;
+                       bus-width = <4>;
                        status = "disabled";
                };
 
                };
 
                gpio1: gpio@2300000 {
-                       compatible = "fsl,qoriq-gpio";
+                       compatible = "fsl,ls1028a-gpio","fsl,qoriq-gpio";
                        reg = <0x0 0x2300000 0x0 0x10000>;
                        interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
                        gpio-controller;
                        #gpio-cells = <2>;
                        interrupt-controller;
                        #interrupt-cells = <2>;
+                       little-endian;
                };
 
                gpio2: gpio@2310000 {
-                       compatible = "fsl,qoriq-gpio";
+                       compatible = "fsl,ls1028a-gpio","fsl,qoriq-gpio";
                        reg = <0x0 0x2310000 0x0 0x10000>;
                        interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
                        gpio-controller;
                        #gpio-cells = <2>;
                        interrupt-controller;
                        #interrupt-cells = <2>;
+                       little-endian;
                };
 
                gpio3: gpio@2320000 {
-                       compatible = "fsl,qoriq-gpio";
+                       compatible = "fsl,ls1028a-gpio","fsl,qoriq-gpio";
                        reg = <0x0 0x2320000 0x0 0x10000>;
                        interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
                        gpio-controller;
                        #gpio-cells = <2>;
                        interrupt-controller;
                        #interrupt-cells = <2>;
+                       little-endian;
                };
 
                usb0: usb@3100000 {
                        status = "disabled";
                };
 
+               tmu: tmu@1f00000 {
+                       compatible = "fsl,qoriq-tmu";
+                       reg = <0x0 0x1f80000 0x0 0x10000>;
+                       interrupts = <0 23 0x4>;
+                       fsl,tmu-range = <0xb0000 0xa0026 0x80048 0x70061>;
+                       fsl,tmu-calibration = <0x00000000 0x00000024
+                                              0x00000001 0x0000002b
+                                              0x00000002 0x00000031
+                                              0x00000003 0x00000038
+                                              0x00000004 0x0000003f
+                                              0x00000005 0x00000045
+                                              0x00000006 0x0000004c
+                                              0x00000007 0x00000053
+                                              0x00000008 0x00000059
+                                              0x00000009 0x00000060
+                                              0x0000000a 0x00000066
+                                              0x0000000b 0x0000006d
+
+                                              0x00010000 0x0000001c
+                                              0x00010001 0x00000024
+                                              0x00010002 0x0000002c
+                                              0x00010003 0x00000035
+                                              0x00010004 0x0000003d
+                                              0x00010005 0x00000045
+                                              0x00010006 0x0000004d
+                                              0x00010007 0x00000045
+                                              0x00010008 0x0000005e
+                                              0x00010009 0x00000066
+                                              0x0001000a 0x0000006e
+
+                                              0x00020000 0x00000018
+                                              0x00020001 0x00000022
+                                              0x00020002 0x0000002d
+                                              0x00020003 0x00000038
+                                              0x00020004 0x00000043
+                                              0x00020005 0x0000004d
+                                              0x00020006 0x00000058
+                                              0x00020007 0x00000063
+                                              0x00020008 0x0000006e
+
+                                              0x00030000 0x00000010
+                                              0x00030001 0x0000001c
+                                              0x00030002 0x00000029
+                                              0x00030003 0x00000036
+                                              0x00030004 0x00000042
+                                              0x00030005 0x0000004f
+                                              0x00030006 0x0000005b
+                                              0x00030007 0x00000068>;
+                       little-endian;
+                       #thermal-sensor-cells = <1>;
+               };
+
+               thermal-zones {
+                       core-cluster {
+                               polling-delay-passive = <1000>;
+                               polling-delay = <5000>;
+                               thermal-sensors = <&tmu 0>;
+
+                               trips {
+                                       core_cluster_alert: core-cluster-alert {
+                                               temperature = <85000>;
+                                               hysteresis = <2000>;
+                                               type = "passive";
+                                       };
+
+                                       core_cluster_crit: core-cluster-crit {
+                                               temperature = <95000>;
+                                               hysteresis = <2000>;
+                                               type = "critical";
+                                       };
+                               };
+
+                               cooling-maps {
+                                       map0 {
+                                               trip = <&core_cluster_alert>;
+                                               cooling-device =
+                                                       <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                       <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+                                       };
+                               };
+                       };
+               };
+
                pcie@1f0000000 { /* Integrated Endpoint Root Complex */
                        compatible = "pci-host-ecam-generic";
                        reg = <0x01 0xf0000000 0x0 0x100000>;
                interrupts = <0 222 IRQ_TYPE_LEVEL_HIGH>,
                             <0 223 IRQ_TYPE_LEVEL_HIGH>;
                interrupt-names = "DE", "SE";
-               clocks = <&dpclk>, <&aclk>, <&aclk>, <&pclk>;
+               clocks = <&dpclk 0>, <&aclk>, <&aclk>, <&pclk>;
                clock-names = "pxlclk", "mclk", "aclk", "pclk";
                arm,malidp-output-port-lines = /bits/ 8 <8 8 8>;
+               arm,malidp-arqos-value = <0xd000d000>;
 
                port {
                        dp0_out: endpoint {