Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
[linux-2.6-block.git] / arch / arm64 / boot / dts / freescale / fsl-ls1012a.dtsi
index 3b0b6e4fdc11ac2e0e923862ad45fd32ab9cd228..82b272fb41b9748489e401d2d4078a030bd2eccf 100644 (file)
                        dr_mode = "host";
                        phy_type = "ulpi";
                };
+
+               msi: msi-controller1@1572000 {
+                       compatible = "fsl,ls1012a-msi";
+                       reg = <0x0 0x1572000 0x0 0x8>;
+                       msi-controller;
+                       interrupts = <0 126 IRQ_TYPE_LEVEL_HIGH>;
+               };
+
+               pcie@3400000 {
+                       compatible = "fsl,ls1012a-pcie", "snps,dw-pcie";
+                       reg = <0x00 0x03400000 0x0 0x00100000   /* controller registers */
+                              0x40 0x00000000 0x0 0x00002000>; /* configuration space */
+                       reg-names = "regs", "config";
+                       interrupts = <0 118 0x4>, /* controller interrupt */
+                                    <0 117 0x4>; /* PME interrupt */
+                       interrupt-names = "aer", "pme";
+                       #address-cells = <3>;
+                       #size-cells = <2>;
+                       device_type = "pci";
+                       num-lanes = <4>;
+                       bus-range = <0x0 0xff>;
+                       ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000   /* downstream I/O */
+                                 0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
+                       msi-parent = <&msi>;
+                       #interrupt-cells = <1>;
+                       interrupt-map-mask = <0 0 0 7>;
+                       interrupt-map = <0000 0 0 1 &gic 0 110 IRQ_TYPE_LEVEL_HIGH>,
+                                       <0000 0 0 2 &gic 0 111 IRQ_TYPE_LEVEL_HIGH>,
+                                       <0000 0 0 3 &gic 0 112 IRQ_TYPE_LEVEL_HIGH>,
+                                       <0000 0 0 4 &gic 0 113 IRQ_TYPE_LEVEL_HIGH>;
+               };
        };
 
        firmware {