arm64: dts: Add Designware I2C controller DTS entries for X-Gene v1 SoC

[linux-2.6-block.git] / arch / arm64 / boot / dts / apm / apm-storm.dtsi

diff --git a/arch/arm64/boot/dts/apm/apm-storm.dtsi b/arch/arm64/boot/dts/apm/apm-storm.dtsi
index d6c9630a5c20a817e840e8f5ed8e00c3a25b3c38..6297b7cdbe8068965a3096dc9b22ef1f0fd7ee01 100644 (file)
--- a/arch/arm64/boot/dts/apm/apm-storm.dtsi
+++ b/arch/arm64/boot/dts/apm/apm-storm.dtsi
@@ -97,6 +97,11 @@
                clock-frequency = <50000000>;
        };
 
+       pmu {
+               compatible = "apm,potenza-pmu", "arm,armv8-pmuv3";
+               interrupts = <1 12 0xff04>;
+       };
+
        soc {
                compatible = "simple-bus";
                #address-cells = <2>;
@@ -145,6 +150,35 @@
                                clock-output-names = "socplldiv2";
                        };
 
+                       ahbclk: ahbclk@17000000 {
+                               compatible = "apm,xgene-device-clock";
+                               #clock-cells = <1>;
+                               clocks = <&socplldiv2 0>;
+                               reg = <0x0 0x17000000 0x0 0x2000>;
+                               reg-names = "div-reg";
+                               divider-offset = <0x164>;
+                               divider-width = <0x5>;
+                               divider-shift = <0x0>;
+                               clock-output-names = "ahbclk";
+                       };
+
+                       sdioclk: sdioclk@1f2ac000 {
+                               compatible = "apm,xgene-device-clock";
+                               #clock-cells = <1>;
+                               clocks = <&socplldiv2 0>;
+                               reg = <0x0 0x1f2ac000 0x0 0x1000
+                                       0x0 0x17000000 0x0 0x2000>;
+                               reg-names = "csr-reg", "div-reg";
+                               csr-offset = <0x0>;
+                               csr-mask = <0x2>;
+                               enable-offset = <0x8>;
+                               enable-mask = <0x2>;
+                               divider-offset = <0x178>;
+                               divider-width = <0x8>;
+                               divider-shift = <0x0>;
+                               clock-output-names = "sdioclk";
+                       };
+
                        qmlclk: qmlclk {
                                compatible = "apm,xgene-device-clock";
                                #clock-cells = <1>;
@@ -383,6 +417,20 @@
                                reg-names = "csr-reg";
                                clock-output-names = "dmaclk";
                        };
+
+                       i2cclk: i2cclk@17000000 {
+                               status = "disabled";
+                               compatible = "apm,xgene-device-clock";
+                               #clock-cells = <1>;
+                               clocks = <&ahbclk 0>;
+                               reg = <0x0 0x17000000 0x0 0x2000>;
+                               reg-names = "csr-reg";
+                               csr-offset = <0xc>;
+                               csr-mask = <0x4>;
+                               enable-offset = <0x10>;
+                               enable-mask = <0x4>;
+                               clock-output-names = "i2cclk";
+                       };
                };
 
                msi: msi@79000000 {
@@ -407,6 +455,18 @@
                                        0x0 0x1f 0x4>;
                };
 
+               scu: system-clk-controller@17000000 {
+                       compatible = "apm,xgene-scu","syscon";
+                       reg = <0x0 0x17000000 0x0 0x400>;
+               };
+
+               reboot: reboot@17000014 {
+                       compatible = "syscon-reboot";
+                       regmap = <&scu>;
+                       offset = <0x14>;
+                       mask = <0x1>;
+               };
+
                csw: csw@7e200000 {
                        compatible = "apm,xgene-csw", "syscon";
                        reg = <0x0 0x7e200000 0x0 0x1000>;
@@ -669,6 +729,50 @@
                        interrupts = <0x0 0x4f 0x4>;
                };
 
+               mmc0: mmc@1c000000 {
+                       compatible = "arasan,sdhci-4.9a";
+                       reg = <0x0 0x1c000000 0x0 0x100>;
+                       interrupts = <0x0 0x49 0x4>;
+                       dma-coherent;
+                       no-1-8-v;
+                       clock-names = "clk_xin", "clk_ahb";
+                       clocks = <&sdioclk 0>, <&ahbclk 0>;
+               };
+
+               gfcgpio: gfcgpio0@1701c000 {
+                       compatible = "apm,xgene-gpio";
+                       reg = <0x0 0x1701c000 0x0 0x40>;
+                       gpio-controller;
+                       #gpio-cells = <2>;
+               };
+
+               dwgpio: dwgpio@1c024000 {
+                       compatible = "snps,dw-apb-gpio";
+                       reg = <0x0 0x1c024000 0x0 0x1000>;
+                       reg-io-width = <4>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       porta: gpio-controller@0 {
+                               compatible = "snps,dw-apb-gpio-port";
+                               gpio-controller;
+                               snps,nr-gpios = <32>;
+                               reg = <0>;
+                       };
+               };
+
+               i2c0: i2c0@10512000 {
+                       status = "disabled";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "snps,designware-i2c";
+                       reg = <0x0 0x10512000 0x0 0x1000>;
+                       interrupts = <0 0x44 0x4>;
+                       #clock-cells = <1>;
+                       clocks = <&i2cclk 0>;
+                       bus_num = <0>;
+               };
+
                phy1: phy@1f21a000 {
                        compatible = "apm,xgene-phy";
                        reg = <0x0 0x1f21a000 0x0 0x100>;
@@ -743,6 +847,25 @@
                        phy-names = "sata-phy";
                };
 
+               /* Do not change dwusb name, coded for backward compatibility */
+               usb0: dwusb@19000000 {
+                       status = "disabled";
+                       compatible = "snps,dwc3";
+                       reg =  <0x0 0x19000000 0x0 0x100000>;
+                       interrupts = <0x0 0x89 0x4>;
+                       dma-coherent;
+                       dr_mode = "host";
+               };
+
+               usb1: dwusb@19800000 {
+                       status = "disabled";
+                       compatible = "snps,dwc3";
+                       reg =  <0x0 0x19800000 0x0 0x100000>;
+                       interrupts = <0x0 0x8a 0x4>;
+                       dma-coherent;
+                       dr_mode = "host";
+               };
+
                sbgpio: sbgpio@17001000{
                        compatible = "apm,xgene-gpio-sb";
                        reg = <0x0 0x17001000 0x0 0x400>;