Merge tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
[linux-2.6-block.git] / arch / arm64 / boot / dts / apm / apm-storm.dtsi
index 6bbab95307aee5222e579b6382771f89e99e9b60..0689c3fb56e3d84fe3ed7790f4a6b25835c86555 100644 (file)
                        };
                };
 
+               msi: msi@79000000 {
+                       compatible = "apm,xgene1-msi";
+                       msi-controller;
+                       reg = <0x00 0x79000000 0x0 0x900000>;
+                       interrupts = <  0x0 0x10 0x4
+                                       0x0 0x11 0x4
+                                       0x0 0x12 0x4
+                                       0x0 0x13 0x4
+                                       0x0 0x14 0x4
+                                       0x0 0x15 0x4
+                                       0x0 0x16 0x4
+                                       0x0 0x17 0x4
+                                       0x0 0x18 0x4
+                                       0x0 0x19 0x4
+                                       0x0 0x1a 0x4
+                                       0x0 0x1b 0x4
+                                       0x0 0x1c 0x4
+                                       0x0 0x1d 0x4
+                                       0x0 0x1e 0x4
+                                       0x0 0x1f 0x4>;
+               };
+
+               csw: csw@7e200000 {
+                       compatible = "apm,xgene-csw", "syscon";
+                       reg = <0x0 0x7e200000 0x0 0x1000>;
+               };
+
+               mcba: mcba@7e700000 {
+                       compatible = "apm,xgene-mcb", "syscon";
+                       reg = <0x0 0x7e700000 0x0 0x1000>;
+               };
+
+               mcbb: mcbb@7e720000 {
+                       compatible = "apm,xgene-mcb", "syscon";
+                       reg = <0x0 0x7e720000 0x0 0x1000>;
+               };
+
+               efuse: efuse@1054a000 {
+                       compatible = "apm,xgene-efuse", "syscon";
+                       reg = <0x0 0x1054a000 0x0 0x20>;
+               };
+
+               edac@78800000 {
+                       compatible = "apm,xgene-edac";
+                       #address-cells = <2>;
+                       #size-cells = <2>;
+                       ranges;
+                       regmap-csw = <&csw>;
+                       regmap-mcba = <&mcba>;
+                       regmap-mcbb = <&mcbb>;
+                       regmap-efuse = <&efuse>;
+                       reg = <0x0 0x78800000 0x0 0x100>;
+                       interrupts = <0x0 0x20 0x4>,
+                                    <0x0 0x21 0x4>,
+                                    <0x0 0x27 0x4>;
+
+                       edacmc@7e800000 {
+                               compatible = "apm,xgene-edac-mc";
+                               reg = <0x0 0x7e800000 0x0 0x1000>;
+                               memory-controller = <0>;
+                       };
+
+                       edacmc@7e840000 {
+                               compatible = "apm,xgene-edac-mc";
+                               reg = <0x0 0x7e840000 0x0 0x1000>;
+                               memory-controller = <1>;
+                       };
+
+                       edacmc@7e880000 {
+                               compatible = "apm,xgene-edac-mc";
+                               reg = <0x0 0x7e880000 0x0 0x1000>;
+                               memory-controller = <2>;
+                       };
+
+                       edacmc@7e8c0000 {
+                               compatible = "apm,xgene-edac-mc";
+                               reg = <0x0 0x7e8c0000 0x0 0x1000>;
+                               memory-controller = <3>;
+                       };
+
+                       edacpmd@7c000000 {
+                               compatible = "apm,xgene-edac-pmd";
+                               reg = <0x0 0x7c000000 0x0 0x200000>;
+                               pmd-controller = <0>;
+                       };
+
+                       edacpmd@7c200000 {
+                               compatible = "apm,xgene-edac-pmd";
+                               reg = <0x0 0x7c200000 0x0 0x200000>;
+                               pmd-controller = <1>;
+                       };
+
+                       edacpmd@7c400000 {
+                               compatible = "apm,xgene-edac-pmd";
+                               reg = <0x0 0x7c400000 0x0 0x200000>;
+                               pmd-controller = <2>;
+                       };
+
+                       edacpmd@7c600000 {
+                               compatible = "apm,xgene-edac-pmd";
+                               reg = <0x0 0x7c600000 0x0 0x200000>;
+                               pmd-controller = <3>;
+                       };
+               };
+
                pcie0: pcie@1f2b0000 {
                        status = "disabled";
                        device_type = "pci";
                                         0x0 0x0 0x0 0x4 &gic 0x0 0xc5 0x1>;
                        dma-coherent;
                        clocks = <&pcie0clk 0>;
+                       msi-parent = <&msi>;
                };
 
                pcie1: pcie@1f2c0000 {
                                         0x0 0x0 0x0 0x4 &gic 0x0 0xcb 0x1>;
                        dma-coherent;
                        clocks = <&pcie1clk 0>;
+                       msi-parent = <&msi>;
                };
 
                pcie2: pcie@1f2d0000 {
                                         0x0 0x0 0x0 0x4 &gic 0x0 0xd1 0x1>;
                        dma-coherent;
                        clocks = <&pcie2clk 0>;
+                       msi-parent = <&msi>;
                };
 
                pcie3: pcie@1f500000 {
                                         0x0 0x0 0x0 0x4 &gic 0x0 0xd7 0x1>;
                        dma-coherent;
                        clocks = <&pcie3clk 0>;
+                       msi-parent = <&msi>;
                };
 
                pcie4: pcie@1f510000 {
                                         0x0 0x0 0x0 0x4 &gic 0x0 0xdd 0x1>;
                        dma-coherent;
                        clocks = <&pcie4clk 0>;
+                       msi-parent = <&msi>;
                };
 
                serial0: serial@1c020000 {