Merge tag 'fbdev-v4.18' of git://github.com/bzolnier/linux

[linux-2.6-block.git] / arch / arm / mach-exynos / platsmp.c

diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
index 5156fe70e030579cf2b707fd755f70133a63926d..6a1e682371b32c400041fb2aa0db1698a19a63d3 100644 (file)
--- a/arch/arm/mach-exynos/platsmp.c
+++ b/arch/arm/mach-exynos/platsmp.c
@@ -163,6 +163,26 @@ int exynos_cluster_power_state(int cluster)
                S5P_CORE_LOCAL_PWR_EN);
 }
 
+/**
+ * exynos_scu_enable : enables SCU for Cortex-A9 based system
+ */
+void exynos_scu_enable(void)
+{
+       struct device_node *np;
+       static void __iomem *scu_base;
+
+       if (!scu_base) {
+               np = of_find_compatible_node(NULL, NULL, "arm,cortex-a9-scu");
+               if (np) {
+                       scu_base = of_iomap(np, 0);
+                       of_node_put(np);
+               } else {
+                       scu_base = ioremap(scu_a9_get_base(), SZ_4K);
+               }
+       }
+       scu_enable(scu_base);
+}
+
 static void __iomem *cpu_boot_reg_base(void)
 {
        if (soc_is_exynos4210() && samsung_rev() == EXYNOS4210_REV_1_1)
@@ -219,11 +239,6 @@ static void write_pen_release(int val)
        sync_cache_w(&pen_release);
 }
 
-static void __iomem *scu_base_addr(void)
-{
-       return (void __iomem *)(S5P_VA_SCU);
-}
-
 static DEFINE_SPINLOCK(boot_lock);
 
 static void exynos_secondary_init(unsigned int cpu)
@@ -389,7 +404,7 @@ static void __init exynos_smp_prepare_cpus(unsigned int max_cpus)
        exynos_set_delayed_reset_assertion(true);
 
        if (read_cpuid_part() == ARM_CPU_PART_CORTEX_A9)
-               scu_enable(scu_base_addr());
+               exynos_scu_enable();
 
        /*
         * Write the address of secondary startup into the