compatible = "arm,cortex-a15";
reg = <1>;
clock-frequency = <1700000000>;
+ clocks = <&clock CLK_ARM_CLK>;
+ clock-names = "cpu";
+ clock-latency = <140000>;
+
+ operating-points = <
+ 1700000 1300000
+ 1600000 1250000
+ 1500000 1225000
+ 1400000 1200000
+ 1300000 1150000
+ 1200000 1125000
+ 1100000 1100000
+ 1000000 1075000
+ 900000 1050000
+ 800000 1025000
+ 700000 1012500
+ 600000 1000000
+ 500000 975000
+ 400000 950000
+ 300000 937500
+ 200000 925000
+ >;
+ #cooling-cells = <2>; /* min followed by max */
};
};
reg = <0x100440A0 0x20>;
#power-domain-cells = <0>;
label = "DISP1";
- clocks = <&clock CLK_FIN_PLL>,
- <&clock CLK_MOUT_ACLK200_DISP1_SUB>,
- <&clock CLK_MOUT_ACLK300_DISP1_SUB>;
- clock-names = "oscclk", "clk0", "clk1";
};
pd_mau: power-domain@100440c0 {
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_TMU>;
clock-names = "tmu_apbif";
- #include "exynos4412-tmu-sensor-conf.dtsi"
+ #thermal-sensor-cells = <0>;
};
sata: sata@122f0000 {
#iommu-cells = <0>;
};
- sysmmu_fimc_dis1: sysmmu@132E0000{
+ sysmmu_fimc_dis1: sysmmu@132e0000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x132E0000 0x1000>;
interrupt-parent = <&combiner>;
};
#include "exynos5250-pinctrl.dtsi"
+#include "exynos-syscon-restart.dtsi"