ARM: dts: armada388-clearfog: move second PCIe port

[linux-2.6-block.git] / arch / arm / boot / dts / armada-388-clearfog.dts

diff --git a/arch/arm/boot/dts/armada-388-clearfog.dts b/arch/arm/boot/dts/armada-388-clearfog.dts
index 6b916305b47fc57f158fdd816f3351008d8fdf4e..2c4a8ad98c4fc0f31ae7898adb07aa9ca810cd66 100644 (file)
--- a/arch/arm/boot/dts/armada-388-clearfog.dts
+++ b/arch/arm/boot/dts/armada-388-clearfog.dts
@@ -54,6 +54,23 @@
        compatible = "solidrun,clearfog-a1", "marvell,armada388",
                "marvell,armada385", "marvell,armada380";
 
+       soc {
+               internal-regs {
+                       usb3@f0000 {
+                               /* CON2, nearest CPU, USB2 only. */
+                               status = "okay";
+                       };
+               };
+
+               pcie-controller {
+                       pcie@3,0 {
+                               /* Port 2, Lane 0. CON2, nearest CPU. */
+                               reset-gpios = <&expander0 2 GPIO_ACTIVE_LOW>;
+                               status = "okay";
+                       };
+               };
+       };
+
        dsa@0 {
                compatible = "marvell,dsa";
                dsa,ethernet = <&eth1>;
@@ -119,6 +136,40 @@
        };
 };
 
+&expander0 {
+       /*
+        * PCA9655 GPIO expander:
+        *  0-CON3 CLKREQ#
+        *  1-CON3 PERST#
+        *  2-CON2 PERST#
+        *  3-CON3 W_DISABLE
+        *  4-CON2 CLKREQ#
+        *  5-USB3 overcurrent
+        *  6-USB3 power
+        *  7-CON2 W_DISABLE
+        *  8-JP4 P1
+        *  9-JP4 P4
+        * 10-JP4 P5
+        * 11-m.2 DEVSLP
+        * 12-SFP_LOS
+        * 13-SFP_TX_FAULT
+        * 14-SFP_TX_DISABLE
+        * 15-SFP_MOD_DEF0
+        */
+       pcie2_0_clkreq {
+               gpio-hog;
+               gpios = <4 GPIO_ACTIVE_LOW>;
+               input;
+               line-name = "pcie2.0-clkreq";
+       };
+       pcie2_0_w_disable {
+               gpio-hog;
+               gpios = <7 GPIO_ACTIVE_LOW>;
+               output-low;
+               line-name = "pcie2.0-w-disable";
+       };
+};
+
 &pinctrl {
        clearfog_dsa0_clk_pins: clearfog-dsa0-clk-pins {
                marvell,pins = "mpp46";